ATR2406_14 Datasheet, PDF (11/26 Pages) ATMEL Corporation – Low-IF 2.4-GHz ISM Transceiver

8.1 TX Register Setting
The following 16-bit word has to be programmed for TX.
MSB
LSB
Data bits
D15 D14 D13 D12 D11 D10 D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
0
1
PA
GFCS
1
RC
MC
SC
Note:
D12 and D13 are only relevant if ramping generator in conjunction with external PA is used, otherwise it can be
programmed 0 or 1.
Table 8-2. Output Power Settings with Bits D12 - D13
PA (Output Power Settings)
D13
D12
0
0
0
1
1
0
1
1
RAMP_OUT (Pin 21)
1.3V
1.35V
1.4V
1.75V
The VRAMP voltage is used to control the output power of an external power amplifier. The voltage ramp is started with the
TX_ON signal.
These bits are only relevant in TX mode.
8.2 RX Register Setting
There are two RX settings possible. For a data rate of 1152kBits/s, an internal clock recovery function is implemented.
8.3 Register Setting Without Clock Recovery
Must be used for data rates below 1.152Mbits/s.
MSB
LSB
Data bits
D15 D14 D13 D12 D11 D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
0
1
X
X
X
X
X
0
RC
MC
SC
Note:
X values are not relevant and can be set to 0 or 1.
ATR2406 [DATASHEET]
11
4779Q–ISM–09/14