AMD29F010B Datasheet, PDF (28/34 Pages) Advanced Micro Devices – 1 Megabit (128 K x 8-bit) CMOS 5.0 Volt-only, Uniform Sector Flash Memory

AC CHARACTERISTICS
555 for program
2AA for erase
PA for program
SA for sector erase
555 for chip erase
Data# Polling
Addresses
PA
WE#
OE#
t_WC
t_AS
t_AH
t_WH
t_GHEL
t_CP
t_{WHWH1 or 2}
CE#
Data
t_WS
t_CPH
t_DS
t_DH
DQ7# D_OUT
A0 for program
55 for erase
PD for program
30 for sector erase
10 for chip erase
Notes:
1. PA = Program Address, PD = Program Data, SA = Sector Address, DQ7# = Complement of Data Input, D_OUT = Array Data.
2. Figure indicates the last two bus cycles of the command sequence.
Figure 13. Alternate CE# Controlled Write Operation Timings
ERASE AND PROGRAMMING PERFORMANCE
Parameter
Chip/Sector Erase Time
Byte Programming Time
Chip Programming Time (Note 3)
Typ (Note 1)
1.0
7
0.9
Limits
Max (Note 2)
15
300
6.25
Unit
Comments
sec
Excludes 00h programming prior to
erasure (Note 4)
µs _{Excludes system-level overhead}
sec ^{(Note 5)}
Notes:
1. Typical program and erase times assume the following conditions: 25°C, 5.0 V V_CC, 1 million cycles. Additionally,
programming typicals assume checkerboard pattern.
2. Under worst case conditions of 90°C, V_CC = 4.5 V (4.75 V for -45), 100,000 cycles.
3. The typical chip programming time is considerably less than the maximum chip programming time listed, since most bytes
program faster than the maximum byte program time listed. If the maximum byte program time given is exceeded, only then
does the device set DQ5 = 1. See the section on DQ5 for further information.
4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.
5. System-level overhead is the time required to execute the four-bus-cycle command sequence for programming. See Table 4
for further information on command definitions.
6. The device has a minimum guaranteed erase cycle endurance of 1 million cycles.
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Am29F010B