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EN2340QI Datasheet, PDF (5/23 Pages) Enpirion, Inc. – 204A Voltage Mode Synchronous Buck PWM
EN2340QI
Electrical Characteristics
NOTE: VIN=12V, Minimum and Maximum values are over operating ambient temperature range (-40°C ≤ TA ≤ +85°C)
unless otherwise noted. Typical values are at TA = 25°C.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
Operating Input Voltage
PVIN
4.5
14.0
V
Controller Input Voltage
AVIN
2.5
5.5
V
AVIN Under Voltage
Lock-Out Rising
AVINUVLOR
Voltage above which UVLO is not
asserted
1.7 2.2 2.4
V
AVIN Under Voltage
Lock-Out Falling
AVINOVLOF
Voltage below which UVLO is
asserted
1.7 2.1 2.3
V
AVIN pin Input Current
Internal Linear
Regulator Output
IAVIN
AVINO
7
mA
3.3
V
Shut-Down Supply
Current
Feedback Pin Voltage
Feedback Pin Voltage
Feedback Pin Input
Leakage Current
IPVINS PVIN=12V, AVIN=3.3V, ENABLE=0V
500
µA
IAVINS PVIN=12V, AVIN=3.3V, ENABLE=0V
100
µA
VFB
VIN = 12V, ILOAD = 0, TA = 25°C Only 0.7425 0.750 0.7575
V
VFB
4.5V ≤ VIN ≤ 14V; 0A ≤ ILOAD ≤ 4A
0.735 0.750 0.765
V
IFB
VFB pin input leakage current
(Note 4)
-5
5
nA
VOUT Rise Time
Soft-Start Capacitor
Range
tRISE
CSS_RANGE
CSS = 47nF (Note 5 and Note 6)
3.2
ms
10
47
68
nF
Continuous Output
Current
IOUT_CONT
0
4
A
Over Current Trip Level
Disable Threshold
ENABLE Threshold
IOCP
VDISABLE
VENABLE
Reference Table 2
ENABLE pin logic Low
ENABLE pin logic High
6
A
0.0
0.95
V
1.25
AVIN
V
ENABLE Lockout Time TENLOCKOUT
8
ENABLE Input Current
IENABLE 370k internal pull-down (Note 4)
4
Switching Frequency
FSW
RFS =3kΩ
1.0
External SYNC Clock
Frequency Lock Range
FPLL_LOCK
Range of SYNC clock frequency (See
Table 1)
0.8
1.8
ms
µA
MHz
MHz
S_IN Threshold – Low
VS_IN_LO S_IN clock logic low level (Note 4)
S_IN Threshold – High
VS_IN_HI S_IN clock logic high level (Note 4)
1.8
S_OUT Threshold – Low VS_OUT_LO S_OUT clock logic low level (Note 4)
S_OUT Threshold –
High
VS_OUT_HI S_OUT clock logic high level (Note 4) 1.8
0.8
V
2.5
V
0.8
V
2.5
V
POK Lower Threshold
POK Output low Voltage
POK Output Hi Voltage
POK Pin VOH Leakage
Current
POKLT
VPOKL
VPOKH
IPOKL
VOUT / VOUT_NOM
With 4mA current sink into POK
PVIN range: 4.5V ≤ VIN ≤ 14V
POK High (Note 4)
90
%
0.4
V
AVIN
V
1
µA
Note 4: Parameter not production tested but is guaranteed by design.
Note 5: Rise time calculation begins when AVIN > VUVLO and ENABLE = HIGH.
Note 6: VOUT Rise Time Accuracy does not include soft-start capacitor tolerance.
www.altera.com/enpirion, Page 5
06878
October 9, 2013
Rev E