AK4555 Datasheet, PDF (8/17 Pages) Asahi Kasei Microsystems – Low Power & Small Package 20bit ΔΣ CODEC

ASAHI KASEI
„ Timing Diagram
MCLK
LRCK
SCLK
LRCK
SCLK
SDTO
SDTI
PWDAN
PWADN
SDTO
[AK4555]
1/fCLK
tCLKH
tCLKL
1/fs
tLRH
tLRL
tSCK
tSCKH
tSCKL
VIH
VIL
dCLK = tCLKH x fCLK x 100
= tCLKL x fCLK x 100
VIH
VIL
Duty = tLRH x fs x 100
= tLRL x fs x 100
VIH
VIL
Figure 1. Clock Timing
tSLR
tLRS
tSDS
tSDH
Figure 2. Serial Interface Timing
tPW
VIH
VIL
VIH
VIL
tDSS
50%VD
VIH
VIL
tPW
tPWV
Figure 3. Reset & Initialize Timing
VIL
VIH
VIL
50%VD
MS0363-E-01
-8-
2005/08