AK5356 Datasheet, PDF (7/22 Pages) Asahi Kasei Microsystems – LOW POWER 20BIT ADC WITH MIC AMP & PGA

ASAHI KASEI
[AK5356]
Parameter
Power Supplies
Power Supply Voltage:
Normal Operation (PDN=“H”) (Note 14)
MVDD (Note 15)
AVDD+DVDD
Power-Down Mode (PDN=“L”) (Note 16)
MVDD + AVDD + DVDD
min
typ
max
Units
3.4
5
mA
6
9
mA
10
100
µA
Note 6. PREL and PRER pins
Note 7. PRENL and PRENR pins. Gain of Pre-Amp is +33dB. Input resistance of Pre-Amp is changed by gain.
Gain = +13dB: 1.9kΩ(typ), Gain = +18dB: 1.1kΩ(typ), Gain = +28dB: 340Ω(typ)
Note 8. A maximum output voltage is the value which fills “THD+N ≤ 0.1%”. It is almost in proportion to MVDD voltage.
-1.5dBV = 2.38Vpp = (MVDD x 0.88)Vpp (typ)
Note 9. PSR is applied to MVDD with 1kHz, 50mVpp.
Note 10. Output voltage is proportional to MVDD voltage and it is typically (MVDD x 0.8) V.
Note 11. ADC is input from MICL/MICR or LIN/RIN and it measures included in IPGA. Internal HPF cancels the offset
of IPGA and ADC.
Note 12. Analog input voltage (Full-scale voltage: IPGA = 0dB) is proportional to AVDD voltage.
IPGA = ADC = (0.6 x AVDD) Vpp (typ)
Note 13. This value is interchannel isolation between LIN and RIN or between MICL and MICR.
Note 14. All blocks in the AK5356 are powered-up. (PMMIC=PMADC= “1”)
Note 15. MPWR pin supplies 0mA.
Note 16. In case of power-down mode, all digital input pins including clocks pins (MCLK, BCLK and LRCK) are held at
DVDD or DVSS. PDN pin is held at DVSS.
MS0171-E-00
-7-
2002/08