AK5356 Datasheet, PDF (16/22 Pages) Asahi Kasei Microsystems – LOW POWER 20BIT ADC WITH MIC AMP & PGA

ASAHI KASEI
[AK5356]
n Timing of Control Register
The internal registers are written by the 3-wire µP interface pins: CSN, CCLK, CDTI. These data are included by Chip
Address (2bit, The AK5356 is fixed to “10”.), Read/Write (1bit), Address (MSB-first, 5bit) and Control data (MSB-first,
8bit). A side of transmitted data is output to each bit by “↓” of CCLK, a side of receiving data is input by “↑” of CCLK.
Writing of data becomes effective by “↑” of CSN. The clock speed of CCLK is 5MHz (max). The value of internal
registers is initialized at PDN pin = “L”.
CSN
CCLK
CDTI
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
C1 C0 R/W A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
C1-C0: Chip Address (Fixed to “10”)
R/W: Read/Write (Fixed to “1”; Write only)
A4-A0: Register Address
D7-D0: Control Data
Figure 11. Control Data Timing
MS0171-E-00
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2002/08