AK4589 Datasheet, PDF (69/76 Pages) Asahi Kasei Microsystems – 2/8 CHANNEL AUDIO CODEC WITH DIR

ASAHI KASEI
[AK4589]
(2)-1-3. ΞΫϊϦοδ
σʔλΛૹग़͍ͯ͠ΔIC͸ɺ1όΠτͷσʔλΛૹग़ͨ͠ޙSDAϥΠϯΛղ์͠·͢(HIGHͷঢ়ଶʹ͢Δ)ɻσ
ʔλΛड৴ͨ͠IC͸࣍ͷΫϩοΫͰSDAϥΠϯΛ “L”ʹ͠·͢ɻ͜ͷಈ࡞͸ΞΫϊϦοδͱݺ͹Εɺ͜ͷಈ
࡞ʹΑΓਖ਼͘͠σʔλసૹ͕ߦΘΕͨΛ֬ೝ͢Δ͜ͱ͕Ͱ͖·͢ɻAK4589͸ελʔτ·ίϯσΟγϣϯͱε
Ϩʔϒ·ΞυϨεΛड͚औΔͱΞΫϊϦοδΛੜ੒͠·͢ɻ·ͨWRITE໋ྩͷ৔߹ʹ͸֤όΠτͷड৴Λྃ׬
͢Δ౓ʹΞΫϊϦοδΛੜ੒͠·͢ɻREAD໋ྩͷ৔߹ʹ͸ɺAK4589͸ΞΫϊϦοδੜ੒ʹଓ͍ͯࢦఆ͞Ε
ͨΞυϨεͷσʔλΛग़ྗͨ͠ޙSDAϥΠϯΛղ์͠ɺSDAϥΠϯΛϞχλʔ͠·͢ɻϚελ͕ετοϓ·ί
ϯσΟγϣϯΛૹΒͣΞΫϊϦοδΛੜ੒ͨ͠৔߹ɺAK4589͸࣍ͷΞυϨεͷσʔλΛग़ྗ͠·͢ɻΞΫϊ
Ϧοδ͕ੜ੒͞Εͳ͔ͬͨ৔߹ɺAK4589͸σʔλग़ྗΛऴྃ͠·͢ɻ
(஫)ADC,DAC෦ͷϨδελ͸READ໋ྩʹରͯ͠ΞΫϊϦοδΛੜ੒͠·ͤΜɻ
Clock pulse
for acknowledge
SCL FROM
MASTER
1
8
9
DATA
OUTPUT BY
TRANSMITTER
DATA
OUTPUT BY
RECEIVER
START
CONDITION
Figure 43. ΞΫϊϦοδͷੜ੒
not acknowledge
acknowledge
(2)-1-4. ୈ1όΠτ
εϨʔϒΞυϨεΛؚΉୈ1όΠτ͸ελʔτίϯσΟγϣϯͷʹޙೖྗ͞ΕɺεϨʔϒ·ΞυϨεʹΑΓό
ε্ͷ̞̘ͷத͔ΒΞΫηε͢Δ̞̘͕બ͹Ε·͢ɻεϨʔϒ·ΞυϨε͸্Ґ7ϏοτͰߏ੒͞Ε·͢ɻ্
Ґ5Ϗοτ͸ɺ “00100”Ͱ͋Γɺ࣍ͷ2Ϗοτ͸ΞΫηε͢ΔICΛબͿҝͷΞυϨεϏοτͰ͋ΓɺCAD1,CAD0
pinʹΑΓઃఆ͞Ε·͢ɻεϨʔϒ·ΞυϨε͕ೖྗ͞ΕΔͱɺσόΠεͷΞυϨε͕Ұக͍ͯ͠ΔIC͸ΞΫϊ
ϦοδΛੜ੒͠ɺͦͷྩ໋ޙΛ࣮ߦ͠·͢ɻୈ1όΠτͷ8൪໨ͷϏοτ(࠷ԼҐϏοτ)͸R/W bitͰ͢ɻR/W bit=
“1”ͷͱ͖READ໋ྩ͕࣮ߦ͞ΕɺR/W bit= “0”ͷͱ͖WRITE໋ྩ͕࣮ߦ͞Ε·͢ɻ
0
0
1
0
0 CAD1 CAD0 R/W
(ADC,DAC෦Ϩδελ͸CAD1,CAD0͸ϐϯʹΑΓઃఆ
CAD1=CAD0=”0”ʹ͸ઃఆ͠ͳ͍ͰԼ͍͞)
(DIR෦Ϩδελ͸”00”ݻఆ)
Figure 44. ୈ1όΠτͷߏ੒
MS0339-J-00
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2004/09