AK4589 Datasheet, PDF (37/76 Pages) Asahi Kasei Microsystems – 2/8 CHANNEL AUDIO CODEC WITH DIR

ASAHI KASEI
[AK4589]
Ϧηοτػೳ
RSTN1 bit = “0”ͷͱ͖ADCͱDAC͸ύϫʔμ΢ϯ͠·͕͢Ϩδελ஋͸ॳظԽ͞Ε·ͤΜɻ͜ͷͱ͖Ξφϩ
άग़ྗ͸VCOMిѹɺDZF1-2 pin͸ “H” ɺSDTO1 pin͸ “L” ʹͳΓ·͢ɻ͜ͷ࣌ҟԻ͕ੜ͡ΔͷͰɺ໰୊ʹ
ͳΔ৔߹͸֎෦Ͱϛϡʔτͯ͠Լ͍͞ɻTable 15ʹRSTN1 bitʹΑΔϦηοτγʔέϯεΛࣔ͠·͢ɻ
RSTN1 bit
Internal
RSTN1 bit
ADC Internal
State
Normal Operation
4~5/fs (9)
1~2/fs (9)
Digital Block Power-down
516/fs ⁽¹⁾
Init Cycle
Normal Operation
DAC Internal
State
ADC In
(Analog)
ADC Out
(Digital)
Normal Operation
Digital Block Power-down
GD ⁽²⁾
(3)
“0”data
Normal Operation
GD
(4)
DAC In
(Digital)
“0”data
(2)
GD
GD
DAC Out
(Analog)
(6) (5)
(6)
Clock In
MCLK,LRCK1,
BICK1
DZF1/DZF2
(7)
Don’t care
4∼5/fs (8)
஫ɿ
(1) ADC͸ύϫʔμ΢ϯղআޙɺΞφϩά෦͕ॳظԽ͞Ε·͢ɻ
(2) Ξφϩάೖྗʹର͢ΔσΟδλϧग़ྗɺσΟδλϧೖྗʹର͢ΔΞφϩάग़ྗ͸܈஗Ԇ(GD)Λ΋ͪ·
͢ɻ
(3) ύϫʔμ΢ϯ࣌ADCग़ྗ͸ “0” σʔλͰ͢ɻ
(4) Ξφϩά෦ͷॳظԽऴྃ࣌ADCग़ྗʹҟԻ͕ग़ྗ͞Ε·͢ɻҟԻ͕໰୊ʹͳΔ৔߹͸σΟδλϧग़ྗ
Λϛϡʔτͯ͠Լ͍͞ɻ
(5) RSTN1 bit = “0”ͷ࣌ɺΞφϩάग़ྗ͸VCOMిѹͰ͢ɻ
(6) RSTN1 bit͕ “0” ʹͳ͔ͬͯΒ4∼5/fsޙɺͼٴRSTN1 bit͕ “1” ʹͳ͔ͬͯΒ1∼2/fsʹޙҟԻ͕ग़ྗ͞Ε
·͢ɻ
(7) Ϧηοτঢ়ଶ(RSTN1 bit = “0”)Ͱ͸֤ΫϩοΫೖྗ(MCLK, BICK1, LRCK1) ΛࢭΊΔ͜ͱ͕Ͱ͖·͢ɻ
Ϧηοτղআ͢Δ৔߹͸ɺ֤ΫϩοΫ(MCLK, BICK1, LRCK1)͕ೖྗ͞ΕͨͰޙRSTN1 bit = “1”Λॻ͖ࠐ
ΜͰԼ͍͞ɻ
(8) DZF1-2 pin ͸ RSTN1 bit ͕ “0” ʹͳΔͱ “H” ʹͳΓɺRSTN1 bit ͕ “1” ʹͳ͔ͬͯΒ 6~7/fs ޙ“L” ʹ
ͳΓ·͢ɻ
(9) RSTN1 bit ʹ “0”Λॻ͖ࠐΜͰ͔Β LSI ಺෦ͷ RSTN ৴߸͕มԽ͢Δ·Ͱ 4~5/fs ͔͔Γ·͢ɻ
Figure 15. Ϧηοτγʔέϯεྫ
MS0339-J-00
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2004/09