AK4589 Datasheet, PDF (55/76 Pages) Asahi Kasei Microsystems – 2/8 CHANNEL AUDIO CODEC WITH DIR

ASAHI KASEI
[AK4589]

ΦʔσΟΦΠϯλϑΣʔεϑΥʔϚοτ

8छྨͷσʔλϑΥʔϚοτ(Table 29)͕બ୒Ͱ͖·͢ɻશϞʔυͱ΋MSBϑΝʔετɺ2’s complementͷσʔλ
ϑΥʔϚοτͰ͢ɻSDTO2͸BICK2ͷ1ཱͪԼ͕ΓͰग़ྗ͞ΕɺDAUX2͸্ཱ͕ͪΓͰϥον͞Ε·͢ɻ
Mode0-5͸ϚελϞʔυͰɺBICK2͸64fsͰ͢ɻMode 6-7͸Mode 4-5ͷεϨʔϒϞʔυͰBICK2͸fs=48kHzͷͱ
͖128fs·ͰରԠ͠·͢ɻ20ϏοτҎԼͷϑΥʔϚοτ(Mode0-2)Ͱ͸ɺαϒϑϨʔϜͷLSBଆ͕੾ΓࣺͯΒΕ
·͢ɻMode 3-7Ͱ͸ԼҐ4Ϗοτ͸AuxσʔλͰɺFigure 32ʹϏοτߏ੒Λࣔ͠·͢ɻ
(஫) ϚελϞʔυͰ࢖༻͢Δ৔߹ɺύϫʔμ΢ϯ࣌(PDN pin = “L”)ͱύϫʔΞοϓ(PDN pin = “H”)͔ͯ͠Β
ϚελϞʔυʹઃఆ͞ΕΔ·Ͱͷؒ͸ɺBICK2ͱLRCK2ͷग़ྗ͸Hi-ZʹͳΓ·͢ɻ
Parity Error͕αϒϑϨʔϜͰݕग़͞ΕΔͱɺSDTO2͔Β͸Τϥʔ͕ “L”ʹͳΔ·Ͱͦͷνϟωϧͷલճͷਖ਼ৗ
஋͕܁Γฦ͠ग़ྗ͞Ε·͢ɻ͞ΒʹPLL͕ಉ֎ظΕΛͱ͢͜ىग़ྗσʔλ͸ “0”ʹͳΓ·͢ɻDAUX2ೖྗͷσ
ʔλΛग़ྗ͢Δ৔߹͸ɺೖྗͱಉ͡σʔλΛϑΥʔϚοτมͯ͠׵SDTO2͔Βग़ྗ͠·͢ɻClock Mode 1ɺPLL
unlock࣌ͷClock Mode 2ͼٴClock Mode 3Ͱ͸ɺग़ྗσʔλ͸DAUX2 pinΛ௨ͯ͠ड৴͞Ε·͢ɻDAUX2ͷೖ
ྗϑΥʔϚοτ͸Mode 5, 7Ҏ֎Ͱ͸24Ϗοτ, Left justifiedͰɺSDTO2΁͸ͦͷ࣌఺Ͱઃఆ͞ΕͨϑΥʔϚοτ
ʹม͞׵Εͯग़ྗ͞Ε·͢ɻMode 5, 7Ͱ͸ೖग़ྗͱ΋ϑΥʔϚοτ͸I²SͰ͢ɻMode 6-7͸εϨʔϒϞʔυͰ͋
Δ఺Λআ͍ͯMode4-5ͱಉ͡Ͱ͢ɻεϨʔϒϞʔυͷ৔߹ɺLRCK2ͱBICK2΁͸MCKO1/2ʹಉͨ͠ظ৴߸Λڙ
ͯ͠څԼ͍͞ɻ
sub-frame of IEC60958
0
34
78
preamble
Aux.
LSB
MSB
11 12
23
AK4589 Audio Data (MSB First)
Figure 32. Ϗοτͷߏ੒
27 28 29 30 31
V UC P
MSB
LSB
0
Mode
0
1
2
3
4
5
6
7
DIF2
0
0
0
0
1
1
1
1
DIF1
0
0
1
1
0
0
1
1
DIF0
0
1
0
1
0
1
0
1
DAUX2
SDTO2
LRCK2
I/O
24bit, Left justified 16bit, Right justified H/L O
24bit, Left justified 18bit, Right justified H/L O
24bit, Left justified 20bit, Right justified H/L O
24bit, Left justified 24bit, Right justified H/L O
24bit, Left justified 24bit, Left justified
24bit, I²S
24bit, I²S
H/L O
L/H O
24bit, Left justified 24bit, Left justified
24bit, I²S
24bit, I²S
H/L I
L/H I
Table 29. ΦʔσΟΦσʔλϑΥʔϚοτ
BICK2
I/O
64fs
O
64fs
O
64fs
O
64fs
O
64fs
O
64fs
O
64-128fs I
64-128fs I
Default
MS0339-J-00
- 55 -
2004/09