AK4589 Datasheet, PDF (36/76 Pages) Asahi Kasei Microsystems – 2/8 CHANNEL AUDIO CODEC WITH DIR

ASAHI KASEI
[AK4589]
ύϫʔμ΢ϯػೳ
AK4589ͷADCͱDAC͸ύϫʔμ΢ϯϐϯ(PDN pin)Λ “L” ʹ͢Δ͜ͱͰύϫʔμ΢ϯͰ͖ɺ͜ͷͱ͖ಉ࣌ʹ
֤σΟδλϧϑΟϧλ͕Ϧηοτ͞Ε·͢ɻPDN pin = “L”Ͱ಺෦Ϩδελ஋͸ॳظԽ͞Ε·͢ɻύϫʔμ΢
ϯϞʔυ࣌ɺΞφϩάग़ྗ͸VCOMిѹɺSDTO1,DZF1-2 pin͸ “L” ʹͳΓ·͢ɻ͜ͷϦηοτ͸ిݯ౤ೖ࣌
ʹඞͣҰ౓ߦͬͯԼ͍͞ɻADCͷ৔߹ɺύϫʔμ΢ϯϞʔυ͕ղআ͞ΕΔͱॳظԽαΠΫϧ͕։࢝͞Ε·͢ɻ
ͦͷͨΊɺग़ྗσʔλ, SDTO1͸522 x LRCK1αΠΫϧ֬ޙఆ͠·͢ɻDACͷ৔߹ɺύϫʔμ΢ϯϞʔυ͕ղ
আ͞ΕΔͱॳظԽαΠΫϧ͕։࢝͞Ε·͢ɻॳظԽதͷΞφϩάग़ྗ͸VCOMిѹͰ͢ɻTable 14ʹύϫʔμ
΢ϯͼٴύϫʔΞοϓ࣌ͷγʔέϯεྫΛࣔ͠·͢ɻ
ADCͱશDAC͸PWADN bitͱPWDAN bitͰͦΕͧΕಠཱʹύϫʔμ΢ϯͰ͖·͢ɻ·ͨɺDAC1-4͸PD1-4 bit
ͰͦΕͧΕಠཱʹύϫʔμ΢ϯ͕Ͱ͖·͢ɻ͜ͷͱ͖Ϩδελ஋͸ॳظԽ͞Ε·ͤΜɻPWADN bit = “0”ͷͱ
͖SDTO1 pin͸ “L” ʹͳΓ·͢ɻPWDAN bit = “0” ͼٴPD1-4 bit = “0”ͷͱ͖ɺΞφϩάग़ྗ͸VCOMిѹɺ
DZF1-2 pin͸ “H” ʹͳΓ·͢ɻ͜ͷͱ͖ҟԻ͕ੜ͡ΔͷͰɺ໰୊ʹͳΔ৔߹͸֎෦Ͱϛϡʔτͯ͠Լ͍͞ɻ
Power
PDN pin
ADC Internal
State
DAC Internal
State
(1)
522/fs
Init Cycle
516/fs (2)
Init Cycle
ADC In
(Analog)
ADC Out
“0”data (4)
(5)
(Digital)
DAC In
(Digital)
“0”data
DAC Out
(6)
(Analog)
Clock In
MCLK,LRCK1,
BICK1
Don’t care
DZF1/DZF2
10∼11/fs (10)
Normal Operation
Power-down
Normal Operation
Power-down
GD ⁽³⁾
GD
(3)
GD
“0”data
“0”data
GD
(6)
(7)
Don’t care
(8)
External
Mute
(9)
Mute ON
Mute ON
஫ɿ
(1) ADC͸ύϫʔμ΢ϯղআޙɺΞφϩά෦͕ॳظԽ͞Ε·͢ɻ
(2) DAC͸ύϫʔμ΢ϯղআޙɺΞφϩά෦͕ॳظԽ͞Ε·͢ɻ
(3) Ξφϩάೖྗʹର͢ΔσΟδλϧग़ྗɺσΟδλϧೖྗʹର͢ΔΞφϩάग़ྗ͸܈஗Ԇ(GD)Λ΋ͪ·͢ɻ
(4) ύϫʔμ΢ϯ࣌ADCग़ྗ͸ “0” σʔλͰ͢ɻ
(5) Ξφϩά෦ͷॳظԽऴྃ࣌ADCग़ྗʹҟԻ͕ग़ྗ͞Ε·͢ɻҟԻ͕໰୊ʹͳΔ৔߹͸σΟδλϧग़ྗΛϛϡʔτ͠
ͯԼ͍͞ɻ
(6) PDN৴߸ͷཱͪԼ͕ΓΤοδɺͼٴPDN৴߸ͷ্ཱ͕ͪΓΤοδͷ512/fsͰޙҟԻ͕ग़ྗ͞Ε·͢ɻ
(7) ύϫʔμ΢ϯঢ়ଶ(PDN pin = “L”)Ͱ͸֤ΫϩοΫೖྗ(MCLK, BICK1, LRCK1) ΛࢭΊΔ͜ͱ͕Ͱ͖·͢ɻ
(8) ύϫʔμ΢ϯঢ়ଶ(PDN pin = “L”)Ͱ͸ɺDZF1-2 pin͸ “L” ʹͳΓ·͢ɻ
(9) ҟԻ(6)͕໰୊ʹͳΔ৔߹͸Ξφϩάग़ྗΛ֎෦Ͱϛϡʔτͯ͠Լ͍͞ɻ
(10) PDN৴߸ͷ “↑”͔Β10∼11/fsͷؒ͸DZF pin = “L”Ͱ͢ɻ
Figure 14.
ύϫʔμ΢ϯʗΞοϓγʔέϯεྫ

MS0339-J-00
- 36 -
2004/09