AK4589 Datasheet, PDF (27/76 Pages) Asahi Kasei Microsystems – 2/8 CHANNEL AUDIO CODEC WITH DIR

ASAHI KASEI
[AK4589]
ϚελϞʔυͱεϨʔϒϞʔυ
ϚελϞʔυͱεϨʔϒϞʔυͷ੾Γସ͑͸ MASTER pin Ͱߦ͍·͢ɻ “H”ͰϚελϞʔυɺ “L”ͰεϨʔ
ϒϞʔυͰ͢ɻ
ϚελϞʔυ࣌ (MASTER pin = “H” )ʹ͸ LRCK1 pin, BICK1 pin ͸ग़ྗͱͳΓ·͢ɻ
εϨʔϒϞʔυ࣌ (MASTER pin = “L” )ʹ͸ LRCK1 pin, BICK1 pin ͸ೖྗͱͳΓ·͢ɻ
LRCK1 pin, BICK1 pin ͷಈ࡞͸ Table 9 ͷΑ͏ʹͳΓ·͢ɻ
PDN pin
L
H
H
PWADN bit, PWDAN bit MASTER pin LRCK1pin
-
L
Input
H
“L”ग़ྗ
“00”
L
Input
H
“L”ग़ྗ
“00”Ҏ֎
L
Input
H
Output
Table 9. LRCK1 pin, BICK1 pinͷಈ࡞
BICK1 pin
Input
lL”ग़ྗ
Input
lL”ग़ྗ
Input
Output
ΦʔσΟΦΠϯλϑΣʔεϑΥʔϚοτ
TDM1-0 bit = “00”ͷͱ͖ɺ8छྨͷσʔλϑΥʔϚοτ(Table 10)͕DIF1-0 bitͰબ୒Ͱ͖·͢ɻશϞʔυͱ΋
MSBϑΝʔετɺ2’s complimentͷσʔλϑΥʔϚοτͰɺSDTO1͸BICK1ͷཱͪԼ͕ΓͰग़ྗ͞Εɺ
SDTI/DAUX1͸BICK1ͷ্ཱ͕ͪΓͰϥον͞Ε·͢ɻ
Figure 1∼4͸SDOS bit = “0”ͷ৔߹ͷλΠϛϯάͰ͢ɻ͜ͷͱ͖SDTO1ʹ͸ADCग़ྗσʔλ͕ग़ྗ͞Ε·͢ɻ
SDOS bit = “1”ͷ৔߹͸ɺDAUX1ೖྗσʔλ͕SDTOϑΥʔϚοτʹม͞׵Εͯग़ྗ͞Ε·͢ɻSDTIͷೖྗϑ
ΥʔϚοτͷ͏ͪɺmode2, 3, 6, 7,10,11,14,15,18,19,22,23Λ16 ∼ 20bitͰ࢖ͬͨ৔߹͸σʔλͷͳ͍LSBʹ͸ “0”
Λೖྗͯ͠Լ͍͞ɻԼهTable 10ͷDefault͸Mode 2Ͱ͢ɻ
Mode MASTER TDM1 TDM0 DIF1 DIF0 SDTO1
SDTI1-4,
DAUX1
LRCK1
I/O
BICK1
I/O
0
0
0
0
0
0 24bit, M J 20bit, L J H/L I ≥ 48fs I
1
0
2
0
3
0
4
1
5
1
6
1
7
1
0
0
0
1 24bit, M J 24bit, L J H/L I ≥ 48fs I
0
0
1
0 24bit, M J 24bit, M J H/L I ≥ 48fs I
0
0
1
1 24bit, I²S 24bit, I²S L/H I ≥ 48fs I
0
0
0
0 24bit, M J 20bit, L J H/L O 64fs O
0
0
0
1 24bit, M J 24bit, L J H/L O 64fs O
0
0
1
0 24bit, M J 24bit, M J H/L O 64fs O
0
0
1
1 24bit, I²S 24bit, I²S L/H O 64fs O
Table 10 ΦʔσΟΦσʔλϑΥʔϚοτ (Normal mode, M J shows MSB justified, L J means LSB justified.)
TDM1-0 bitΛ “01”ʹઃఆ͢ΔͱɺTDM 256 modeͱͳΓɺSDTI1 pinʹશDAC(8ch)ͷσʔλΛೖྗ͠·͢ɻ
SDTI2-4΁ͷೖྗσʔλ͸ແࢹ͞Ε·͢ɻBICK1͸256fsݻఆɺLRCK1ͷ “H”෯ɺ “L”෯͸1/256fs(min)Ͱ͢ɻ8
छྨͷσʔλϑΥʔϚοτ(Table 11)͕DIF1-0 bitͰબ୒Ͱ͖·͢ɻશϞʔυͱ΋MSBϑΝʔετɺ2’s
complimentͷσʔλϑΥʔϚοτͰɺSDTO1͸BICK1ͷཱͪԼ͕ΓͰग़ྗ͞ΕɺSDTI1͸BICK1ͷ্ཱ͕ͪΓ
Ͱϥον͞Ε·͢ɻTDMϞʔυͷͱ͖ɺSDOS bit, LOOP1-0 bit͸ “0”ʹઃఆͯ͠Լ͍͞ɻTDM 128 mode
(96kHz)࣌ɺTDM1-0 bitΛ “10”ʹઃఆ͍ͯͩ͘͠͞ɻSDTI1 pinʹDAC(4ch; L1,R1,L2,R2)ɺSDTI2 pinʹ
DAC(4ch;L3,R3,L4,R4)ͷσʔλΛೖྗ͠·͢ɻ
MS0339-J-00
- 27 -
2004/09