AK8185A Datasheet, PDF (5/12 Pages) Asahi Kasei Microsystems – Low - Jitter Clock Generator with Integrated VCO

AK8185A
Electrical Characteristics
All specifications at VDD=VDD_LVDS=VCP= 3.3V5%, Ta: -40 to +85℃, unless otherwise noted
Parameter
Conditions
MIN
TYP MAX
Unit
Control Pin LVCMOS Input Characteristics
Input high voltage (V_IH)
Input low voltage (V_IL)
Input high current (I_IH)
Input low current (I_IL)
LVCMOS Output Characteristics
Bypass output frequency
Output frequency
Output high voltage
Output low voltage
RMS phase jitter
Output rise/fall slew rate
Output duty cycle
Skew between outputs
250MHZ (10kHz to 20MHz)
20% ⇔ 80%
LVPECL Output Characteristics
Output frequency
Output high voltage
Output low voltage
Differential output voltage
RMS phase jitter
Output rise/fall slew rate
Output duty cycle
Skew between outputs
LVDS Output Characteristics
Output frequency
Differential output voltage
Magnitude change
Common-mode voltage
Magnitude change
RMS phase jitter
Output rise/fall time
Output duty cycle
Skew between outputs
625MHZ (10kHz to 20MHz)
20% ⇔ 80%
625MHZ (10kHz to 20MHz)
20% ⇔ 80%
0.6Vcc
0.4Vcc
200
-200
V
V
uA
uA
21.875
43.75
Vcc-0.5
0.4
2.4
45
10
28.47
250
0.3
MHz
MHz
V
ps, RMS
55
%
ps
43.75
683.264 MHz
Vcc-1.18
Vcc-0.73
V
Vcc-2
Vcc-1.55
V
0.6
1.23
V
0.4
ps, RMS
175
ps
45
55
%
10
ps
43.75
0.247
1.125
45
683.264 MHz
0.454
V
50
mV
1.375
V
50
mV
0.4
ps, RMS
255
ps
55
%
10
ps
draft-E-02
Dec. 2012
-5-