AK8185A Datasheet, PDF (10/12 Pages) Asahi Kasei Microsystems – Low - Jitter Clock Generator with Integrated VCO

Programmable Output Divider Settings
Control Inputs
OD2
OD1
OD0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Output Divider
1
2
3
4
Reserved
6
Reserved
8
Programmable Output Type
Control Inputs
OS1
OS0
0
0
0
1
1
0
1
1
Output Type
LVCMOS, OSC_OUT Off
LVDS, OSC_OUT Off
LVPECL, OSC_OUT Off
LVPECL, OSC_OUT On
Output Enable
Control Inputs
CE
0
1
Operating Condition
Power Down
Normal
Output
Hi‐Z
Active
Reset
Control Inputs
_____
RSTN
0
01
1
Operating Condition
Device Reset
PLL Recalibration
Normal
Output
Hi‐Z
Hi‐Z
Active
draft-E-02
- 10 -
AK8185A
Dec. 2012