AK8185A Datasheet, PDF (3/12 Pages) Asahi Kasei Microsystems – Low - Jitter Clock Generator with Integrated VCO

AK8185A
- Pin Descriptions -
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
EPAD
Pin Name
V_CC_OUT
OUTN1
OUTP1
V_CC_OUT
OUTN0
OUTP0
CE
NC
V_CC_VCO
OS1
OS0
RSTN
OD0
OD1
OD2
V_CC_PLL2
REG_CAP2
V_CC_PLL1
REG_CAP1
V_CC_IN
XIN
GND1
OSC_OUT
NC
PR0
PR1
V_CC_OUT
OUTN3
OUTP3
V_CC_OUT
OUTN2
OUTP2
GND
Pin
Type
PWR
OUT
OUT
PWR
OUT
OUT
IN
PWR
IN
IN
IN
IN
IN
IN
PWR
OUT
PWR
OUT
PWR
IN
Ground
OUT
IN
IN
PWR
OUT
OUT
PWR
OUT
OUT
Ground
Description
3.3V Power Supply for output buffers
Differential output pair or two single-ended outputs
Differential output pair or two single-ended outputs
3.3V Power Supply for output buffers
Differential output pair or two single-ended outputs
Differential output pair or two single-ended outputs
Chip enable control pin
No Connection
3.3V Power Supply for internal VCO
Output type select control pin
Output type select control pin
Device reset (active low)
Output divider control pins
Output divider control pins
Output divider control pins
3.3V Power Supply for PLL circuitry
Capacitor for internal regulator (connect to a 10-μF Y5V capacitor
to GND)
3.3V Power Supply for PLL circuitry
Capacitor for internal regulator (connect to a 10-μF Y5V capacitor
to GND)
3.3V Power Supply for input buffers
Parallel resonant crystal or LVCMOS inputs
Additional ground for device
Bypass LVCMOS output
No Connection
Prescaler and Feedback divider control pins
Prescaler and Feedback divider control pins
3.3V Power Supply for output buffers
Differential output pair or two single-ended outputs
Differential output pair or two single-ended outputs
3.3V Power Supply for output buffers
Differential output pair or two single-ended outputs
Differential output pair or two single-ended outputs
Thermal Pad (Must be soldered to Ground)
draft-E-02
Dec. 2012
-3-