AK8856 Datasheet, PDF (47/105 Pages) Asahi Kasei Microsystems – NTSC/PAL Digital Video Decoder

ASAHI KASEI
[ AK8856 ]
Output timing for the Camera Interface mode is illustrated here (the polarity of HV/VAF/DVALID can be changed
by register setting).
NTSC Register Set : VLF = 1’b0, OIF[1:0] = 2’b10
Line # 3 4 5 6 7 … 21 22 23 24 25 26 27 28 29 30 31 … 258 259 260 261 262 263 264 265
HV/DVALID
(QVGA)
VAF
(QVGA)
HV/DVALID
(VGA)
VAF
(VGA)
HV/DVALID
(C IF )
VAF
(C IF )
HV/DVALID
(QCIF)
VAF
(QCIF)
HV/DVALID
(QVGAL)
VAF
(QVGAL)
HV/DVALID
(CIFL)
VAF
(C IF L)
HV/DVALID
(601)
VAF
(601)
Note: For output modes other than VGA or 601, DVALID signal becomes active (low) at either ODD or EVEN timing.
QVGAL: Rotated QVGA, CIFL: Rotated CIF
Rev-01
47
2007/03