|
AK4641 Datasheet, PDF (44/51 Pages) Asahi Kasei Microsystems – 16 BIT CODEC WITH BLUETOOTH INTERFACE | |||
|
◁ |
ASAHI KASEI
[AK4641]
Addr
0AH
Register Name
ALC Mode Control 2
R/W
Default
D7
D6
D5
D4
D3
D2
D1
D0
0
REF6 REF5 REF4 REF3 REF2 REF1 REF0
RD
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
1
1
0
1
1
0
REF6-0: Set the Reference value at ALC1 Recovery Operation
During the ALC1 recovery operation, if the IPGA value exceeds the setting reference value by gain operation, then
the IPGA does not become larger than the reference value. For example, when REF6-0 bits = â30Hâ, RATT =
2step, IPGA = â2FHâ, even if the input signal does not exceed the âALC1 Recovery Waiting Counter Reset Levelâ,
the IPGA does not change to â2FHâ + 2step = â31Hâ, but keeps â30Hâ. Default is â36Hâ.
REF6-0
GAIN (dB)
STEP
47H
+27.5
46H
+27.0
45H
+26.5
:
:
36H
+19.0
Default
:
:
10H
+0.0
:
:
0.5dB
06H
â5.0
05H
â5.5
04H
â6.0
03H
â6.5
02H
â7.0
01H
â7.5
00H
â8.0
Table 23. Setting Reference Value at ALC1 Recovery Operation
Addr
0BH
Register Name
Input PGA Control
R/W
Default
D7
D6
D5
D4
D3
D2
D1
D0
0
IPGA6 IPGA5 IPGA4 IPGA3 IPGA2 IPGA1 IPGA0
RD
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
1
0
0
0
0
IPGA6-0: Input Analog PGA (See Table 7.)
When IPGA gain is changed, IPGA6-0 bits should be written while PMMIC bit is â1â and ALC1 bit is â0â. IPGA
gain is reset when PMMIC bit is â0â, and then IPGA operation starts from the default value when PMMIC is
changed to â1â. When ALC1 bit is changed from â1â to â0â, IPGA holds the last gain value set by ALC1 operation.
When IPGA6-0 bits are read, the register values written by the last write operation is read out regardless the actual
gain.
Addr
0CH
0DH
Register Name
Lch Digital ATT Control
Rch Digital ATT Control
R/W
Default
D7
ATTL7
ATTR7
R/W
0
D6
ATTL6
ATTR6
R/W
0
D5
ATTL5
ATTR5
R/W
0
D4
ATTL4
ATTR4
R/W
0
D3
ATTL3
ATTR3
R/W
0
D2
ATTL2
ATTR2
R/W
0
D1
ATTL1
ATTR1
R/W
0
D0
ATTL0
ATTR0
R/W
0
ATTL/R7-0: Digital ATT Output Control
These bits control the attenuation level of DAC output of Stereo CODEC. Step size of ATT is approximately
0.5dB (See Table 13).
Note) Even if DATTC bit = â1â, ATTR7-0 bits are not changed when the ATTL7-0 bits are written.
MS0301-E-00
- 44 -
2004/05
|
▷ |