AK4641 Datasheet, PDF (38/51 Pages) Asahi Kasei Microsystems – 16 BIT CODEC WITH BLUETOOTH INTERFACE

ASAHI KASEI
[AK4641]
Addr
01H
Register Name
Power Management 2
R/W
Default
D7
D6
MCKPD
0
R/W
RD
1
0
D5
D4
D3
D2
0
MCKAC PMMO2
0
RD
R/W
R/W
RD
0
0
0
0
PMDAC: DAC Block of Stereo CODEC Power Control
0: Power down (Default)
1: Power up
PMMO2: Mono Out2 Power Control
0: Power down (Default)
1: Power up
MCKAC: Master Clock input Mode Select
0: C-MOS input (Default)
1: AC-Coupling input
MCKPD: MCLK Input Buffer Control
0: Enable
1: Disable (Default)
When MCLK input with AC coupling is stopped, MCKPD bit should be set to “1”.
ADC and DAC of 16bit Stereo CODEC are powered-down at MCKPD bit = “1”.
D1
D0
0
PMDAC
RD
R/W
0
0
Note) The stereo mixer block (PMMIX) is powered down automatically.
PMLO=PMMO2=PMAD2 bits = “0”: Power Down
Others:
Power Up
Each block can be powered down respectively by writing “0” in each bit. When the PDN pin is “L”, all blocks are
powered down.
When all bits except MCKPD bit are “0” in the 00H and 01H addresses, all blocks are powered down. The register
values remain unchanged. IPGA gain is reset when PMMIC bit is “0” (refer to the IPGA6-0 bits description).
When any of the blocks are powered up, the PMVCM bit must be set to “1”.
MCLK, BICK and LRCK must always be present unless PMMIC=PMADC=PMDAC bits = “0” or PDN pin = “L”.
BBICK and BSYNC must always be present unless PMAD2=PMDA2=PMBIF bits = “0” or PDN pin = “L”.
MS0301-E-00
- 38 -
2004/05