AK2572 Datasheet, PDF (40/50 Pages) Asahi Kasei Microsystems – APC for Burst Mode Applicable Direct Modulation Laser Diode

ASAHI KASEI
[AK2572]
Table 9-5 EEPROM : Adjustment Data Setting Map (“0” must be written where data bit is marked with “0”)
Address D7
D6
D5
D4
D3
D2
D1
D0
60h
VREFTRIM
TEMP_OFFSET
61h
PWR_SEL
BURST_ALM
BURST
_SET
PWR_LVL2
_SET
SFP_SET
PWR_LVL1
_SET
62h
APC_FF_SET
APC_FB_SET
APC_INIT
_SET
DAC3
_GAIN
DAC2
_GAIN
DAC1
_GAIN
63h
0
TIMER_ EXTALM2 EXTALM1
OPTALM _POL
_POL
TEMP
_DET
DAC_SET
64h
OPTALM
PDGAIN
65h
0
0
EXTALM2 EXTALM1 CURRALM
_SET
_SET
_SET
OPTALM TIMER_ TIMER_
_SET
EXTALM2 EXTALM1
66h
TEMPALM
_SET
0
0
0
0
0
0
0
67h
68h
MODV
_SEL
69h
－
6Ah
TEMP_WIN
MOD_FBRT
BIAS_FBRT
TEMPALM
9.5 Register Configuration
In Table 9-6 and Table 9-7, Register configuration is shown. As to the access limitations via Digital I/F, please
refer to Table 9-1. Details of “ R/W ” column and “ Form “ column in Table 9-6 are described below.
(1) “R/W” column
R : Read only operation is possible in Adjustment Mode and in Self-Operation Mode when Write Protect
operation is released. Writing the data into these Registers via Digital I/F is impossible.
R/W : Read / Write operation is possible in Adjustment Mode, and Read operation is possible in
Self-Operation Mode when Write Protect operation is released.
Data written via Digital I/F is retained till operation mode is altered or data is modified. The AK2572
allows LD module adjustment at the product shipment by modifying the data in R/W registers.
R/FW: In addition to R/W function above, Read / Write operation is possible in Self-Operation Mode when
Write Protect operation is released.
(2) “Form“ column
U : Unsigned
S : Signed （2’s Complement ）
Table 9-6 Register Configuration
Register
Address
Function
R_VREFTRIM [7:4]
R_TEMP
_OFFSET [3:0]
R_PWR_SEL [7:6]
00h On-chip oscillator frequency
00h Temperature sensor offset
01h
EEPROM data switching at
Power Leveling [2]
R _BURST_ALM [5:4] 01h
EXTALM mask setting at
Burst mode
R _BURST_SET [3] 01h
R_PWR_LVL2
_SET [2]
01h
R_SFP_SET [1]
01h
R_PWR_LVL1_SET [0] 01h
Burst mode setting
Power Leveling [2] setting
SFP_MSA support setting
Power Leveling [1] setting
Bit Form R/W
4 U R/W
4 U R/W
Note
2 U R/W Refer to Table 5-2 [*1]
0:Non-masked, 1:Masked
2 U R/W
[5]: EXTALM2,
[4]: EXTALM1
1 U R/W
0:OFF, 1:ON
1 U R/W
0:OFF, 1:ON
１ U R/W
1 U R/W
0:ON, 1:OFF
Refer to Table 5-1
-40-
< MS0290-E-01>
2004/8