AK2572 Datasheet, PDF (38/50 Pages) Asahi Kasei Microsystems – APC for Burst Mode Applicable Direct Modulation Laser Diode

ASAHI KASEI
[AK2572]
9.4 EEPROM Configuration
EEPROM configuration is listed in Table 9-3. EEPROM configuration of adjustment data area is listed in Table
9-4 and Table 9-5. The access to EEPROM depends on its operation modes (Refer to Table 10-1). And the access
to EEPROM is also limited by Write Protect setting (Refer to Section 9.2).
< Important Notice > The adjusted data in AKM factory are stored in advance at address location (Device
Address＝A6h, Address＝60h) for the offset voltage of the On-chip temperature sensor. If such excessive
temperature stress is to be applied to the AK2572 which exceeds a guaranteed EEPROM data retention
conditions (for 10 years at 85℃), it is important to read the pre-determined data in advance and to re-write the
same data back into EEPROM after an exposure to the excessive temperature environment. Even if the
exposure time is shorter than the retention time, any accelerated temperature stress tests (such as baking) are
performed, it is recommended to read the pre-set data first and to re-write it after the test. Access to unused
address locations is not functionally guaranteed.
Table 9-3 EEPROM Address Configuration
Device
Address
Address
Data (D7 ~ D0)
Initial
value
Note
A0h 00h (0) ~ 7Dh (125)
User Area (1k bits)
00h [*1]
A0h 80h (128) ~ FFh (255)
No Memory
－
A2h 00h (0) ~ FFh (255)
No Memory
－
A4h 00 h (0) ~ 7Fh (127)
E_MOD_TC (1k bits)
Temperature Compensation Data for Imod
00h [*2]~[*4]
A4h 80h (128) ~ FFh (255)
E_BIAS_TC (1k bits)
Temperature Compensation Data for Ibias
00h [*2], [*3]
A6h 00h (0) ~ 1Fh (31)
E_EXTRA_TC (256 bit)
Temperature Compensation Data for EXTRA DAC
00h [*5]
A6h 20h (32) ~ 3Fh (63)
E_APC_TRGT_TC (256 bit)
Temperature Compensation Data for APC target
00h [*5]
A6h
40h (64) ~ 5Fh (95)
E_CURRALM_BIAS / MOD_TC (256 bit)
Temperature Compensation Data for CURRALM threshold
FFh
[*5]
A6h 60h (96) ~ 6Ah (106)
Adjustment Data (88 bit)
－
A6h 6Bh (107) ~ 7Dh (125)
Reserved (152 bit）
－
A6h 7Eh (126), 7Fh (127)
Write Protect Control (16 bit)
00h
［*1］With both RE_SFP_SET＝”1” and RE_PWR_LVL1＝”1”, this area becomes setting area for Imod
temperature compensation data [2] (E_MOD_TC2) of Power Leveling [1] function.
［*2］R_TEMP (Upper 7 bits A-to-D code of the temperature sensor) and address are corresponded (1.5 ℃/step)
and then the temperature compensation data is written.
［*3］With RE_PWR_LVL1＝“0” and RE_PWR_LVL2＝“1”, these area become setting area for Ibias and Imod
temperature compensation data of Power Leveling [2] function.
［*4］With both RE_SFP_SET＝”1” and RE_PWR_LVL1＝”1”, this area becomes setting area for Imod
temperature compensation data [1] (E_MOD_TC1) of Power Leveling [1] function.
［*5］Upper 5 bits of R_TEMP and address are corresponded (6.0 ℃/step), and then the temperature
compensation data is written.
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< MS0290-E-01>
2004/8