AK2572 Datasheet, PDF (34/50 Pages) Asahi Kasei Microsystems – APC for Burst Mode Applicable Direct Modulation Laser Diode

ASAHI KASEI
[AK2572]
9. Digital Interface Configuration
9.1 Memory Configuration
EEPROM and Register configuration is shown in Figure 9-1. Access to EEPROM and Register is executed via
2-wire Digital Interface (I/F).
Figure 9-1 Memory Configuration
Device
Device
Address-1 Address-2
Address
Contents
0000 0000
User Area or
~
Temperature Compensation Data for Imod [2]
0111 1101
(1K)
1010
000
0111 1110
0111 1111
Write Protect Control (2Address)
(A0h)
1000 0000
~
1111 1111
No Memory
(1K)
1010
001
(A2h)
0000 0000
~
1111 1111
No Memory
(2K)
1010
010
(A4h)
Switch I-DAC1
and V-DAC3 by
RE_MODV_SEL
setting
0000 0000
~
0111 1111
Temperature Compensation Data for Imod
[E_MOD_TC(1K): I-DAC1 or V-DAC3]
1000 0000
~
1111 1111
0000 0000
~
0001 1111
Temperature Compensation Data for Ibias
[E_BIAS_TC(1K): I-DAC2]
Temp. Compensation Data for EXTRA DAC
[E_EXTRA_TC(256): V-DAC3 or I-DAC1]
(=Not DAC for Imod)
0010 0000
~
0011 1111
Temperature Data for APC_FB target
[E_APC_TRGT_TC(256)]
1010
0100 0000 _{Temperature Data for CURRALM Threshold}
011
~
0101 1111
[E_CURRALM_BIAS/MOD_TC(256)]
(A6h)
0110 0000
~
0111 1111
1000 0000
~
1111 1111
Set-up Data
(256)
No memory
(1K)
1010
100
(A8h)
1010
100
0000 0000
~
1111 1110
1111 1111
Register
Operation Mode Change Command
[1] USER AREA for SFP_MSA support when
RE_SFP_SET="0"
[2] E_MOD_TC2 for Power Leveling [1] when
RE_SFP_SET="1" and
RE_PW R_LVL1_SET="1"
Power Leveling [1] (Select the data for
Imod by MOD_CTRL-pin) is available
when RE_SFP_SET="1" and
RE_PW R_LVL1_SET="1"
Power Leveling [2] is available when
RE_PW R_LVL2_SET="1"
(RE_PW R_LVL1_SET="0"）
Selected by RE_PWR_SEL[1:0]
I-BIAS0
I-BIAS1
I-BIAS2
I-BIAS3
I-MOD0
I-MOD1
I-MOD2
I-MOD3
Write Protect Control (WP)
Register
A0h/7Eh R_WP_CTRL[0] (Protect Control)
A0h/7Fh R_PASSW D[7:0] (Password)
EEPROM
A6h/7Eh E_WP_CTRL[0] (Protect Control)
A6h/7Fh E_PASSWD[7:0] (Password )
Write Protect is enable when W P-pin="L" or
R_WP_CTRL[0]="1" (W P-pin setting has a
higher priority than R_WP_CTRL)
* Only A0h(1K) area is possible to Read
when Write Protect is enable
Write Protect is released when WP-pin="H"
and R_W P_CTRL[0]="0"
* Full access is possible when when W rite
Protect is released (When R_PASSWD[7:0]
via Digital I/F agree with E_PASSWD[7:0],
access to R_WP_CTRL[0] becomes possible)
[*] Device address is configured with Device address-1 (“1010 “＝“Ah”) and Device address-2.
Device address-2 in 3 bits Binary expression is converted into Hexadecimal code by multiplying it by 2.
For example, when Device address-1＝“1010” and Device address-2＝“011”, Device address becomes
“A6h”.
-34-
< MS0290-E-01>
2004/8