AK8853XQ Datasheet, PDF (32/70 Pages) Asahi Kasei Microsystems – NTSC/PAL/SECAM Digital Video Decoder

[AK8853XQ/ VN]
7.19 Sync separation, sync detection, and black-level fine tuning
The AK8853 performs sync separation and sync detection on the digitized input signal, uses the
detected sync signal as the timing reference for the decoding process, and calculates the phase error
from the separated sync signal and applies it to control of the sampling clock.
Black-level tuning can be performed in the sync separation block. The black-level fine-tuning band,
which is 10 bits wide before REC 601 conversion, can be adjusted -8~+7 LSB in 1-LSB steps, with one
step resulting in a change of about 0.4 LSB in the output code.
BKLVL[3:0]-bits: Settings for black-level fine tuning
BKLVL[3:0]-bits
Code adjustment of black level
Approx. change in 601 level (LSB)
[0001]
+1
+0.4
[0010]
+2
+0.8
[0011]
+3
+1.2
[0100]
+4
+1.6
[0101]
+5
+2.0
[0110]
+6
+2.4
[0111]
+7
+2.8
[0000]
Default
None
[1000]
−8
−3.2
[1001]
−7
−2.8
[1010]
−6
−2.4
[1011]
−5
−2.0
[1100]
−4
−1.6
[1101]
−3
−1.2
[1110]
−2
−0.8
[1111]
−1
−0.4
The black level is adjusted upward or downward by the value of the setting, which must be in
2’s-complement form. Black-level adjustment is also enabled during the vertical blanking interval.
7.20 Digital pedestal clamp
The digitally converted input signal is clamped in the digital signal processing block. The internal clamp
position depends on the input signal type (either 286 mV sync or 300 mV sync), but pedestal position is
output as code 16 for both types. The digital pedestal clamp function can adjust the time constant and
set the coring level.
DPCT[1:0]-bits: Settings for digital pedestal clamp time constant
DPCT[1:0]-bits
Transition time constant
Notes
[00]
Fast
—
[01]
Middle
—
[10]
Slow
—
[11]
Disable
Digital pedestal clamp OFF
DPCC[1:0]-bits: Settings for digital clamp pedestal coring level
DPCC[1:0]-bits
Transition time constant (bit)
[00]
±1
[01]
±2
[10]
±3
[11]
Non-coring
Notes
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—
—
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Rev-E-00
32
2008/01