AME9003 Datasheet, PDF (3/39 Pages) Asahi Kasei Microsystems – CCFL Backlight Controller

AME, Inc.
AME9003
n Pin Description
Preliminary
CCFL Backlight Controller
Pin #
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Pin Name
Pin Description
CSDET
Current sense detect. Connect this pin to the CCFL current sense resistor divider.
During the initial startup period this pin senses that the CCFL has struck when
V(CSDET) > 1.25 volts. If, after the initial start up period, this pin is below 1.25V for 8
consecutive clock cycles after SSC > 3V then the circuit will shutdown.
BATTFB
OUTC
UVLO feedback pin. If this pin is above 1.5V then the OUTA pin is allowed to switch, if
below 1.25V then OUTA is disabled.
Drives one of the external NFETs, opposite phase of OUTAPB.
OUTAPB
Drives one of the external NFETs, opposite phase of OUTC.
OUTA
Drives the high side PFET.
VBATT
Battery input. This is the positive supply for the OUTA driver.
BRPOL
VDD
Brightness polarity control. When this pin is low the CCFL brightness increases as
the voltage at the BRIGHT pin increases. When this pin is high the CCFL brightness
decreases as the voltage at the BRIGHT pin increases.
Regulated 5V supply input.
CT1
Sets the dimming cycle frequency. Usually about 100Hz.
FB
Negative input of the voltage control loop error amplifier.
COMP
BRIGHT
SSV
PNP
Output of the voltage control loop error amplifier.
Brightness control input. A DC voltage on this controls the duty cycle of the dimming
cycle. This pin is compared to a 3V ramp at the CT1 pin. Analog brightness control
may be accomplished by small modifications to the external circuitry.
Soft start ramp for the voltage control loop. (20uA source current.) The voltage at SSV
clamps the voltage at COMP to be no greater than SSV thereby limiting the increase of
the switching duty cycle.
Drives the base of an external PNP transistor used for the 5V LDO.
3