AME9003 Datasheet, PDF (24/39 Pages) Asahi Kasei Microsystems – CCFL Backlight Controller

AME, Inc.
AME9003
Preliminary
CCFL Backlight Controller
BATTFB
The BATTFB pin is designed to sense the battery volt-
age and enable the pin OUTA. When the voltage at
BATTFB is below 1.25 volts then OUTA is disabled, when
the voltage at BATTFB is larger than 1.5V then OUTA is
enabled. There is 250mV of hysteresis between the turn
on and the turnoff thresholds. This pin does not disable
any other portion of the circuit except the OUTA pin.
Notably, the other two drivers, OUTAPB and OUTC con-
tinue to switch when the voltage at BATTFB is below
1.25V.
Ringing
Due to the leakage inductances of transformer T1 volt-
ages at the drains of Q3 can potentially ring to values
substantially higher than the ideal value (which is twice
the battery voltage). The application schematic in Figure
17 uses a snubbing circuit to limit the extent of the ring-
ing voltage. Components C9,R8,D2 and D3 make up the
snubbing circuit. The nominal voltage at the common
node is approximately twice the battery voltage. If either
of the drains of Q3 ring above that voltage then diodes D2
or D3 forward bias and allow the ringing energy to charge
capacitor C9. Resistor R8 bleeds off the extra ringing
energy preventing the voltage at the common node from
increasing substantially higher than twice the battery volt-
age. The extra power dissipation is:
P(dissipated) = Vbatt² / R8
For the example, in Figure 17, the power dissipation of
the snubber circuit with Vbatt=15V is 58mW or approxi-
mately 1% of the total input power. The value of R8 can
be optimized for a particular application in order to mini-
mize dissipated power.
Excessive ringing is usually a sign that the driving fre-
quency is not well matched to the resonant characteris-
tics of the tank circuit. In a well designed application a
snubber circuit will not be necessary.
Layout Considerations
Due to the switching nature of this circuit and the high
voltages that it produces this application can be sensitive
to board parasitics. In fact, one of the advantages, of this
design is that the circuit uses the parasitic elements of
the application as resonant components, thus eliminat-
ing the need for more added components.
Particular care must be taken with the different gounding
loops. The best performance has been obtained by us-
ing a ” star” ground technique. The star technique re-
24
turns all significant ground paths back to the center of
the ” star” . Ideally we would place the center of the star
directly on the VSS pin of the AME9003. The bypass
capacitors would, ideally, be connected as close to the
center of the star as possible. The schematic in Figure
18 attemps to show this star ground configuration by bring-
ing all the ground returns back to the same point on the
drawing. Separate ground returns back to the star are
especially important for higher current switching paths.