AK4220 Datasheet, PDF (28/33 Pages) Asahi Kasei Microsystems – 7:3 Audio Switch and 6:3 Video Switch

I
[AK4220]
Addr
06H
Register Name
Detection Control3
R/W
Default
D7
D6
D5
D4
D3
D2
D1
D0
VDMD MVDET MADETR MADETL 0
LV2
LV1
LV0
R/W R/W R/W R/W R/W R/W R/W R/W
0
0
0
0
0
0
1
0
LV2-0: Audio Input Detection Level Setting
Refer Table 9
MADETL/R: Audio Input Detection Mask Setting for Lch/Rch
Refer Table 12
MVDET: Video Synchronization Signal Detection Mask Setting
Refer Table 12
VDMD: Video Synchronization Signal Detection Mode Setting
“0”: If video signal above 0.07Vpp(typ) is detected VDET bit becomes “1” and when reading 08H
VDET bit becomes “0”. (default)
“1”: Refer VDET bit (Video Synchronization Signal Detection) section (Page19).
Addr
07H
Addr
08H
Register Name
Parallel Output
R/W
Default
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
Q4
Q3
Q2
Q1
Q0
R/W R/W R/W R/W R/W R/W R/W R/W
0
0
0
1
1
1
1
1
Q4-0: Parallel Output Setting
“1”: Hi-Z(default)
“0”: “L” Output
Register Name
AV Detection
R/W
Default
D7
0
READ
0
D6
VDET
READ
0
D5
ADETR
READ
0
D4
ADETL
READ
0
D3
0
READ
0
D2
0
READ
0
D1
0
READ
0
D0
0
READ
0
ADETL/R: Audio Input Detection States for Lch/Rch
“0”: Undetected (default)
“1”: Detected
VDET: Video Synchronization Signal Detection States
“0”: Undetected (default)
“1”: Detected
Writing to address 08H will be ignored.
MS0627-E-00
- 28 -
2007/05