AK4220 Datasheet, PDF (17/33 Pages) Asahi Kasei Microsystems – 7:3 Audio Switch and 6:3 Video Switch

I
[AK4220]
■ Input Detection Circuit, INT pin Output
The AK4220 has channel-independent audio input detection circuit and video synchronization signal detection circuit.
Each input source is set as shown in Table 7 and Table 8.
ADSEL2 bit
0
0
0
0
1
1
1
1
ADSEL1 bit
0
0
1
1
0
0
1
1
ADSEL0 bit
0
1
0
1
0
1
0
1
Detection Source
Off
LIN1 / RIN1
LIN2 / RIN2
LIN3 / RIN3
LIN4 / RIN4
LIN5 / RIN5
LIN6 / RIN6
LIN7 / RIN7
(default)
Table 7. Audio Input Detection Selector
VDSEL2 bit
0
0
0
0
1
1
1
1
VDSEL1 bit
0
0
1
1
0
0
1
1
VDSEL0 bit
0
1
0
1
0
1
0
1
Detection Source
Off
VIN1
VIN2
VIN3
VIN4
VIN5
VIN6
N/A
(default)
Table 8. Video Synchronization Signal Detection Selector
1. ADETL bit (Lch Audio Input Detection), ADETR bit (Rch Audio Input Detection)
The audio input detection circuit samples the input signal by accuracy of 100kHz±30%.
If the signal over the detection reception value is detected consecutively more than the frequency set by ACT1-0 bits,
ADETL-R bits become “1” and if the signal over the detection reception value isn’t detected consecutively more than the
frequency set by ACT1-0 bits during the time set by RTM1-0 bit, ADETL-R bits become “0”.
The audio input detection for L/R channels is done independently. The input reception can be adjusted in the range of
±6dB from -31dBV(= +40mV₀p)(typ) by LV2-0 bits. When writing to 05H(ADSEL2-0, ACT1-0, RTMI1-0 bits), the
counters for the consecutive detection frequency and recovery time are reset, and ADETL/R bits are reset to “0”.
The setting of MADEL/R bit doesn’t affect the operation of ADETL/R bit.
MS0627-E-00
- 17 -
2007/05