AK4220 Datasheet, PDF (11/33 Pages) Asahi Kasei Microsystems – 7:3 Audio Switch and 6:3 Video Switch

I
SWITCHING CHARACTERISTICS
(Ta= -40∼85°C; AVDD = VVDD1-2 = 4.5∼5.5V, DVDD= 3.0∼3.6V, C_L= 20pF)
Control Interface Timing (I²C Bus, Note: 20)
SCL Clock Frequency
fSCL
-
Bus Free Time Between Transmissions
tBUF
1.3
Start Condition Hold Time (prior to first clock pulse) tHD:STA
0.6
Clock Low Time
Clock High Time
Setup Time for Repeated Start Condition
SDA Hold Time from SCL Falling (Note: 21)
SDA Setup Time from SCL Rising
Rise Time of Both SDA and SCL Lines
Fall Time of Both SDA and SCL Lines
tLOW
1.3
tHIGH
0.6
tSU:STA
0.6
tHD:DAT
0
tSU:DAT
0.1
tR
-
tF
-
Setup Time for Stop Condition
tSU:STO
0.6
Pulse Width of Spike Noise Suppressed by Input Filter tSP
0
Capacitive load on bus
Cb
-
Control Interface Timing (4-wire serial mode)
CCLK Period
CCLK Pulse Width Low
Pulse Width High
CDTI Setup Time
CDTI Hold Time
CSN “H” Time
CSN “↓” to CCLK “↑”
CCLK “↑” to CSN “↑”
CDTO Delay
CSN “↑” to CDTO Hi-Z
tCCK
200
tCCKL
80
tCCKH
80
tCDS
50
tCDH
50
tCSW
150
tCSS
50
tCSH
50
tDCD
tCCZ
Power-down & Reset Timing
PDN Pulse Width
(Note: 21)
TPD
150
Note: 20. I²C is a registered trademark of Philips Semiconductors.
Note: 21. Data must be held for sufficient time to bridge the 300 ns transition time of SCL.
Note: 22. The AK4220 should be reset by PDN pin = “L” upon power up.
[AK4220]
400 kHz
-
μs
-
μs
-
μs
-
μs
-
μs
-
μs
-
μs
0.3
μs
0.3
μs
-
μs
50
ns
400
pF
ns
ns
ns
ns
ns
ns
ns
ns
45
ns
70
ns
ns
MS0627-E-00
- 11 -
2007/05