AK8826VN Datasheet, PDF (27/157 Pages) Asahi Kasei Microsystems – HD/SD Multi Format Video Encoder with 3ch DAC

(3) Clock rate change in Component Video Encoder mode
Fig.23 shows the sequence of Clock rate is changed from 27MHz to 74.25MHz or 74.25MHz to 27MHz.
HDMOD[1:0]-bit (r)
DACnEN-bit (r)
PLLPDN-bit (r)
HDBB-bit (r)
Data input
27MHz / 74.25MHz mode
(5)
D1 or D2 / D3 or D4
(2)
74.25MHz / 27MHz mode
D3 or D4 / D1 or D2
(9)
(4)
(1)
(3)
(7)
t>1Frm
Input
t > 1ms
Low or High
(8)
Input
CLKIN
27MHz / 74.25MHz
Low or High
(6)
74.25MHz / 27MHz
[AK8826VN]
Fig. 22 Clock rate change in Component Video Encoder mode
(1) To avoid making noise, Black Burst Generator is On, then stop inputting data.
(2) Turns Off DACs
(3) Black Burst Generator OFF.
(4) Set PLLPDN-bit = 0 (PLL Block becomes Power Down States)
(5) Mode Change, for example, from D1 to D3.
(6) Chang clock
It is allows that changing clock without stopping clock input, however, PLLPDN-bit should be 0.
(7) Turning on PLL (Set PLLPDN-bit = 1)
(8) After PLL becomes stable, starting input video data.
(9) Turn ON DACs after more than 30ms later
MS0972-E-01
27
2008/12