AK4645EN Datasheet, PDF (25/96 Pages) Asahi Kasei Microsystems – Stereo CODEC with MIC/HP-AMP

ASAHI KASEI
[AK4645]
„ PLLϞʔυ(AIN3 bit = “0”, PMPLL bit = “1”)
PMPLL bit = “1”ͷ࣌ɺ಺ଂͷߴਫ਼౓ΞφϩάPLL͸FS3-0 bits, PLL3-0 bitsͰબ୒ͨ͠ΫϩοΫʹԠͯ͡ಈ࡞͠
·͢ɻPLLͷϩοΫ࣌ؒ͸ɺిݯ౤ೖޙɺPMPLL bit Λ “0” Æ “1”ʹมߋ͠ɺ҆ఆͨ͠ΫϩοΫ͕ೖྗ͞Εͨ
৔߹ɺ·ͨ͸αϯϓϦϯάप೾਺͕มߋ͞Εͨ৔߹ɺTable 5ͷ௨ΓͰ͢ɻAIN3 bit = “1”ͷͱ͖PLL͸࢖༻Ͱ
͖·ͤΜɻ
1) PLL Modeͷઃఆ
Mode ^{PLL3 PLL2}
bit bit
0
0
0
1
0
0
2
0
0
3
0
0
4
0
1
5
0
1
6
0
1
7
0
1
8
1
0
12
1
1
13
1
1
14
1
1
15
1
1
Others
Others
PLL1 PLL0
bit bit
PLLج४Ϋϩ
οΫೖྗϐϯ
ೖྗप೾਺
VCOC pinÍ·
R,C
R[Ω] C[F]
0
0
LRCK pin
1fs
6.8k 220n
0
1
N/A
-
-
-
1
0
BICK pin
32fs
10k 4.7n
10k 10n
1
1
BICK pin
64fs
10k 4.7n
10k 10n
0
0
MCKI pin 11.2896MHz 10k 4.7n
0
1
MCKI pin
12.288MHz 10k 4.7n
1
0
MCKI pin
12MHz
10k 4.7n
1
1
MCKI pin
24MHz
10k 4.7n
0
0
MCKI pin
19.2MHz 10k 4.7n
0
0
MCKI pin
13.5MHz 10k 10n
0
1
MCKI pin
27MHz
10k 10n
1
0
MCKI pin
13MHz
10k 220n
1
1
MCKI pin
26MHz
10k 220n
N/A
Table 5. Setting of PLL Mode (*fs: Sampling Frequency)
PLLϩοΫ
࣌ؒ
(max)
160ms
-
2ms
4ms
2ms
4ms
40ms
40ms
40ms
40ms
40ms
40ms
40ms
60ms
60ms
Default
2) PLL ModeͷαϯϓϦϯάप೾਺ઃఆ
ج४ΫϩοΫ͕MCKIೖྗͷ৔߹͸ɺTable 6ͷઃఆʹΑΓαϯϓϦϯάप೾਺͕બ୒Ͱ͖·͢ɻ
Mode
FS3 bit
FS2 bit
FS1 bit
FS0 bit Sampling Frequency
0
0
0
0
0
8kHz
Default
1
0
0
0
1
12kHz
2
0
0
1
0
3
0
0
1
1
4
0
1
0
0
16kHz
24kHz
7.35kHz
5
0
1
0
1
11.025kHz
6
0
1
1
0
14.7kHz
7
0
1
1
1
22.05kHz
10
1
0
1
0
32kHz
11
1
0
1
1
14
1
1
1
0
48kHz
29.4kHz
15
1
1
1
1
44.1kHz
Others
Others
N/A
Table 6. Setting of Sampling Frequency at PMPLL bit = “1” (Reference Clock = MCKI pin)
MS0543-J-00
- 25 -
2006/09