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AK4645EN Datasheet, PDF (16/96 Pages) Asahi Kasei Microsystems – Stereo CODEC with MIC/HP-AMP | |||
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ASAHI KASEI
[AK4645]
Parameter
Symbol
min
typ
max
Control Interface Timing (3-wire Serial mode)
CCLK Period
tCCK
200
-
-
CCLK Pulse Width Low
Pulse Width High
CDTI Setup Time
CDTI Hold Time
CSN âHâ Time
CSN âââ to CCLK âââ
CCLK âââ to CSN âââ
Control Interface Timing (I2C Bus mode):
tCCKL
80
-
-
tCCKH
80
-
-
tCDS
40
-
-
tCDH
40
-
-
tCSW
150
-
-
tCSS
50
-
-
tCSH
50
-
-
SCL Clock Frequency
fSCL
-
-
400
Bus Free Time Between Transmissions
tBUF
1.3
-
-
Start Condition Hold Time (prior to first clock pulse) tHD:STA
0.6
-
-
Clock Low Time
tLOW
1.3
-
-
Clock High Time
tHIGH
0.6
-
-
Setup Time for Repeated Start Condition
tSU:STA
0.6
-
-
SDA Hold Time from SCL Falling (Note 34)
tHD:DAT
0
-
-
SDA Setup Time from SCL Rising
tSU:DAT
0.1
-
-
Rise Time of Both SDA and SCL Lines
tR
-
-
0.3
Fall Time of Both SDA and SCL Lines
tF
-
-
0.3
Setup Time for Stop Condition
tSU:STO
0.6
-
-
Capacitive Load on Bus
Cb
-
Pulse Width of Spike Noise Suppressed by Input Filter tSP
0
-
400
-
50
Power-down & Reset Timing
PDN Pulse Width (Note 35)
tPD
150
-
-
PMADL or PMADR âââ to SDTO valid (Note 36)
tPDV
-
1059
-
Note 33. I2C͸Philips SemiconductorsÍ·à±à¿¥à¦à¶ªÍ°Í¢É»
Note 34. ÏÊÎ»Í¸à ·à¯¿300ns (SCLͷཱͪԼÍÎà£Ø)Í·Øà¸à£ÍÎͳÍÎ͹ͳÎÎͤÎÉ»
Note 35. AK4645͸PDN pin = âLâͰϦηοÏÍÎÎ͢ɻ
Note 36. PMADL bitÎͨ͸PMADR bitÎཱͪà§ÍͯÍÎÍ·LRCKΫϩοΫͷ âââͷճ਺Ͱ͢ɻ
Units
ns
ns
ns
ns
ns
ns
ns
ns
kHz
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
pF
ns
ns
1/fs
MS0543-J-00
- 16 -
2006/09
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