AK4634EN Datasheet, PDF (25/94 Pages) Asahi Kasei Microsystems – 16-Bit Mono CODEC with ALC & MIC/SPK -AMP

[AK4634]
OPERATION OVERVIEW
■ System Clock
There are the following five clock modes to interface with external devices. (Table 1 and Table 2)
Mode
PMPLL bit M/S bit PLL3-0 bit
PLL Master Mode
1
1
Table 4
PLL Slave Mode 1
(PLL Reference Clock: MCKI pin)
1
0
Table 4
PLL Slave Mode 2
(PLL Reference Clock: FCK or BICK pin)
1
0
Table 4
EXT Slave Mode
0
0
x
EXT Master Mode
0
1
x
Table 1. Clock Mode Setting (x: Don’t care)
Figure
Figure 19
Figure 20
Figure 21
Figure 22
Figure 23
Figure 24
Mode
PLL Master Mode
PLL Slave Mode 1
(PLL Reference Clock: MCKI pin)
MCKO bit MCKO pin MCKI pin
BICK pin FCK pin
0
1
“L” Output
256fs Output
Master Clock
Input for PLL
(Note 30)
16fs/32fs/64fs
Output
1fs
Output
0
1
“L” Output ^{Master Clock}
Input for PLL
256fs Output ^{(Note 30)}
 16fs
Input
1fs
Input
PLL Slave Mode 2
(PLL Reference Clock: FCK or BICK pin)
0
“L” Output
GND
256fs/
EXT Slave Mode
0
“L” Output
512fs/
1024fs
Input
256fs/
EXT Master Mode
0
“L” Output
512fs/
1024fs
Input
Note 30. 12MHz/13.5MHz/24MHz/27MHz
Table 2. Clock pins state in Clock Mode
16fs/32fs/64fs
Input
1fs
Input
 32fs
Input
1fs
Input
32fs/64fs
Output
1fs
Output
MS0686-E-03
- 25 -
2014/10