AK4634EN Datasheet, PDF (15/94 Pages) Asahi Kasei Microsystems – 16-Bit Mono CODEC with ALC & MIC/SPK -AMP

[AK4634]
Parameter
Symbol
min
EXT Master Mode (Figure 2)
MCKI Frequency: 256fs
fCLK
1.8816
512fs
fCLK
3.7632
1024fs
fCLK
7.5264
Pulse Width Low
tCLKL
0.4/fCLK
Pulse Width High
tCLKH
0.4/fCLK
FCK Frequency (MCKI = 256fs)
fFCK
7.35
(MCKI = 512fs)
fFCK
7.35
(MCKI = 1024fs)
fFCK
7.35
Duty Cycle
dFCK
-
BICK: Period (BCKO1-0 bit = “00”)
tBCK
-
(BCKO1-0 bit = “01”)
tBCK
-
(BCKO1-0 bit = “10”)
tBCK
-
Duty Cycle
dBCK
-
Audio Interface Timing
DSP Mode: (Figure 3, Figure 4)
FCK “” to BICK “” (Note 21)
tDBF 0.5 x tBCK40
FCK “” to BICK “” (Note 22)
tDBF 0.5 x tBCK40
BICK “” to SDTO (BCKP bit = “0”) tBSD
70
BICK “” to SDTO (BCKP bit = “1”) tBSD
70
SDTI Hold Time
tSDH
50
SDTI Setup Time
tSDS
50
Except DSP Mode: (Figure 5)
BICK “” to FCK Edge
tBFCK
40
FCK to SDTO (MSB)
tFSD
70
(Except I²S mode)
BICK “” to SDTO
tBSD
70
SDTI Hold Time
tSDH
50
SDTI Setup Time
tSDS
50
Note 20. Duty Cycle = (the width of “L”)/(the period of clock)*100
Note 21. MSBS, BCKP bits = “00” or “11”
Note 22. MSBS, BCKP bits = “01” or “10”
Note 23. BICK rising edge must not occur at the same time as FCK edge.
typ
2.048
4.096
8.192
-
-
8
8
8
50
1/16fFCK
1/32fFCK
1/64fFCK
50
0.5 x tBCK
0.5 x tBCK
-
-
-
-
-
-
-
-
-
max
12.288
13.312
13.312
-
-
48
26
13
-
-
-
-
-
Unit
MHz
MHz
MHz
ns
ns
kHz
kHz
kHz
%
ns
ns
ns
%
0.5 x tBCK + 40 ns
0.5 x tBCK +40 ns
70
ns
70
ns
-
ns
-
ns
40
ns
70
ns
70
ns
-
ns
-
ns
MS0686-E-03
- 15 -
2014/10