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AK4543 Datasheet, PDF (25/31 Pages) Asahi Kasei Microsystems – AC’97 Rev 2.1 Multimedia Audio CODEC | |||
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[ASAHI KASEI]
[AK4543]
The below table shows the relationship for the AC-Link Powerdown/Powerup procedure.
AC-Link PowerdownProcedure SubsequentProcedurefor
Comments
Powerup
RESET#=L
Cold Reset
Cold Reset wakes up all of codecs with default register
setting concurrently.
Shutdown(Complete Powerdown) ColdReset
Cold Reset wakes up all of codecs with default register
setting concurrently.
Note:
1) The AC-Link Powerdown of Primary ACÂ97 will stop supplying the BIT_CLK to the Secondary AC Â97.
2) When the AC-Link Powerdown is issued to the Secondary of AC Â97, the Secondary of ACÂ97 will go to the AC-
Link Powerdown and Warm Reset will be followed by Syn signal at the next time frame.
nTestability
Activating the Test Modes
AC â97 has two test modes. One is for ATE in circuit test and the other is for vendor specific tests. AC â97 enters the ATE
in circuit test mode regardless of SYNC signal (high or low) if SDATA_OUT is sampled high at the trailing edge of RESET#.
If AC â97 enters AKM test mode when coming out of RESET if SYNC is high with SDATA_OUT low. These cases will never
occur during standard operating conditions.
Regardless of the test mode, the AC â97 controller must issue a âColdâ reset to resume normal operation of the AC â97
Codec.
Test Mode Functions
ATE in circuit test mode
When AC â97 is placed in the ATE test mode, its digital AC-link outputs (i.e. BIT_CLK and SDATA_IN) are driven to a high
impedance state. This allows ATE in circuit testing of the AC â97 controller.
<M0046-E-01>
- 25 -
1999/01
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