AK4543 Datasheet, PDF (17/31 Pages) Asahi Kasei Microsystems – AC’97 Rev 2.1 Multimedia Audio CODEC

[ASAHI KASEI]
[AK4543]
nAC’97 Register Map
Each Register is a 16bit word.
Note: The AK4543 outputs “valid” 0000h if the controller reads an unused or invalid register address .
Reg Name
Num
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
00h Reset
0 “0” “1” “0” “1” “1” “0” “1” “0” “1” “0” “1” “0” “0” “0” “0”
02h Master Volume
Mute X ML5 ML4 ML3 ML2 ML1 ML X
0
X MR5 MR4 MR3 MR2 MR1 MR0
04
LINVL Volume
Mute X ML5 ML4 ML3 ML2 ML1 ML X
0
X MR5 MR4 MR3 MR2 MR1 MR0
06h Master Volume Mono Mute X
X
X
X
X
X
X
X
X MR5 MR4 MR3 MR2 MR1 MR0
0Ah PC_BEEP Volume
Mute X
X
X
X
X
X
X
X
X
X PV3 PV2 PV1 PV0 X
0Ch Phone Volume
Mute X
X
X
X
X
X
X
X
X
X GN4 GN3 GN2 GN1 GN0
0Eh Mic Volume
Mute X
X
X
X
X
X
X
X 20dB X GN4 GN3 GN2 GN1 GN0
10h Line In Volume
Mute X
X GL4 GL3 GL2 GL1 GL0 X
X
X GR4 GR3 GR2 GR1 GR0
12h CD Volume
Mute X
X GL4 GL3 GL2 GL1 GL0 X
X
X GR4 GR3 GR2 GR1 GR0
14h Video Volume
Mute X
X GL4 GL3 GL2 GL1 GL0 X
X
X GR4 GR3 GR2 GR1 GR0
16h Aux Volume
Mute X
X GL4 GL3 GL2 GL1 GL0 X
X
X GR4 GR3 GR2 GR1 GR0
18h PCM Out Volume
Mute X
X GL4 GL3 GL2 GL1 GL0 X
X
X GR4 GR3 GR2 GR1 GR0
1Ah Record Select
X
X
X
X
X SL2 SL1 SL0 X
X
X
X
X SR2 SR1 SR0
1Ch Record Gain
Mute X
X
X GL3 GL2 GL1 GL0 X
X
X
X GR3 GR2 GR1 GR0
20h General Purpose
POP X 3D X
X
X MIX MS LPBK X
X
X
X
X
X
X
22h 3D Control
X
X
X
X
X
X
X
X
X
X
X
X
X
X DP1 DP0
26h Powerdown Ctrl/Stat
PR7 PR6 PR5 PR4 PR3 PR2 PR1 PR0 X
X
X
X REF ANL DAC ADC
28h Extended Audio ID
ID1 ID0 X
X
X
X AMAP X
X
X
X
X
X
X
X
X
7Ch Vendor ID1
“0” “1” “0” “0” “0” “0” “0” “1” “0” “1” “0” “0” “1” “0” “1” “1”
7Eh Vendor ID2
“0” “1” “0” “0” “1” “1” “0” “1” “0” “0” “0” “0” “0” “0” “1” “0”
*) Vender ID of AKM is “AKM” :This ID has been approved by Intel.
*) The AK4543 outputs “X” bits as “0”.
*) A write on “Invalid” registers will not affect the operation of the AK4543.
*) ANL, DAC, ADC Bit in register 26h are all “0” following cold reset. When each section is ready for normal
operation, the coresponding bit becomes “1”. The Powerdown register(26h) is not affected by a write to Reset
register(0h). See “Mixer Registers” in AC’97 specification for details. Vref is controlled only by PR3.
Default
2D50h
8000h
8000h
8000h
0000h
8008h
8008h
8808h
8808h
8808h
8808h
8808h
0000h
8000h
0000h
0000h
na
x200h
414Bh
4D02h
nReset Register (Index 00h)
<Write>
When any value is written to this register , all registers in the AK4543 except for register “26h” Powerdown
Ctrl/Stat Register are reset to the default values. The value of this register is not altered.
<Read>
Reading this register returns “2D50h”composed of the ID code of the part, a code for the type of 3D enhancement,
18
bit ADC/DAC resolution, and a code for True Line Level Out.
*Setting D14 – D10 “01011” means AKM 3D enhancement which is registered in Audio Codec ’97 Component
Specification Rev 1.03 and 2.1 .
*Setting D8 “1” indicates 18bit ADC resolution and D6 ”1” does DAC resolution.
*Setting D4 “1” means True Line Level Out is supported with Volume Control(Index 04h).
n Play Master Volume Registers (Index 02h ,06h) and LINVL(True Line Level Out) Volume Register(Index 04h)
The following table shows the relationship between bits and the attenuation value with step size of 1.5dB. The
AK4543 has a range of 0dB to –46.5dB. The AK4543 does not support the optional MX5 bit.
The AK4543 d e t e c ts when MX5 is set and set all 5 LSBs to 1s. Example: When the driver writes a “01xxxxx” the AK4543
interpret that as “0011111”. When this register is read, the returned value is “0011111”.
Mute MX5 MX4 MX3 MX2 MX1 MX0
Att.
0
0
0
0
0
0
0
0dB
0
0
0
0
0
0
1
-1.5dB
0
0
0
0
0
1
0
-3.0dB
0
0
0
0
0
1
1
-4.5dB
-------------------------------------------------------------------------
0
0
1
1
1
1
0 -45.0dB
0
0
1
1
1
1
1 -46.5dB
-------------------------------------------------------------------------
0
1
X
X
X
X
X -46.5dB
-------------------------------------------------------------------------
1
X
X
X
X
X
X
Mute
<M0046-E-01>
- 17 -
1999/01