AK4543 Datasheet, PDF (16/31 Pages) Asahi Kasei Microsystems – AC’97 Rev 2.1 Multimedia Audio CODEC

[ASAHI KASEI]
[AK4543]
This address shows the register index for which data is being returned in the slot2.
This address port is a copy of slot1 of the output frame, and index address input to SDATA_OUT is loop ed back to
the AC’97 controller through SDATA_IN. This allows the controller to insure the AK4543 receives the correct data.
c)Slot2: Status Data Port
Status data addressed by the command address port of Output Stream is output through SDATA_IN pin.
Bit19:4
Control Register Read Data (the contents of indexed address in the slot 1)
Bit3:0
“0”
Note that the address of Status Data Port data is consistent with Status Address Port data of slot 1 in the same
frame. If the read operation is issued in the frame N by the AC’97 controller, Status Data Port data is output
through SDATA_IN in the frame N+1. Note that data is only available in this frame, only one time and that
the following frames are invalid if another read operation is not issued.
d)Slot3: PCM Record Left Channel
Record(ADC) data format is 18bits MSB first 2’s complement. Lower 2bits of the frame are ignored. If ADC block
is powered down, slot-3 valid bit in the slot 0 is invalid ( “0”), and data is as all “0”.
Bit19:2
Bit1:0
Audio ADC left channel output
“0”
e)Slot4: PCM Record Right Channel
Record(ADC) data format is 18bits MSB first 2’s complement. Lower 2bits of the frame are ignored. If ADC block
is powered down, slot-4 valid bit in the slot 0 is invalid ( “0”), and data is as all “0”.
Bit19:2
Audio ADC right channel output
Bit1:0
“0”
f)Slot5: Modem Line Codec
The AK4543 does not incorporate the modem codec, all bits are stuffed with “0” in this slot.
Bit19:0
“0”
g)Slot6: Microphone Record Data
The AK4543 does not incorporate the 3^rd ADC for microphone, all bits are stuffed with “0” in this slot.
Bit19:0
“0”
h)Slots7-12
Bits19:0
Reserved for future enhancement
“0”
<M0046-E-01>
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1999/01