AK4561 Datasheet, PDF (23/48 Pages) Asahi Kasei Microsystems – 16bit CODEC with built-in ALC and MIC/HP-Amp

ASAHI KASEI
AKM CONFIDENTIAL
[AK4561]
ALC Mode Control 1
Addr
Register Name
D7
D6
D5
D4
D3
D2
D1
D0
05H ALC Mode Control 1
0
0 ZELM LMAT1 LMAT0 FDATT RATT
RESET
0
0
0
0
0
0
0
LMTH: ALC Limiter Detection Level / Recovery Waiting Counter Reset Level
LMTH
0
LMTH ALC Limiter Detection Level ALC Recovery Waiting Counter Reset Level
0
ADC Input ≥-5.0dB
-5.0dB > ADC Input ≥ -7.0dB
RESET
1
ADC Input ≥ -3.0dB
-3.0dB > ADC Input ≥ -5.0dB
Table 10. ALC Limiter Detection Level / Recovery Waiting Counter Reset Level
RATT: ALC Recovery GAIN Step
During the ALC Recovery operation, the number of steps changed from current IPGA value is
set. For example, when the current IPGA value is 30H, RATT = “1” is set, IPGA changes to 32H
by the ALC recovery operation, the input signal level is gained by 1dB (=0.5dB x 2).
When the IPGA value exceeds the reference level (REF6-0), the IPGA value does not increase.
RATT GAIN STEP
0
1
RESET
1
2
Table 11. ALC Recovery GAIN Step Setting
FDATT: FADEIN/OUT ATT Step
During the FADEIN/OUT operation, the number of steps changed from current IPGA value is
set. For example, when the current IPGA value is 30H, FDATT = “1” is set, IPGA changes to
32H(at FADEIN operation) or 2EH (at FADEOUT operation) by the FADEIN/OUT operation,
the input signal level is changed by 1dB (=0.5dB x 2).
When the IPGA value exceeds the reference level (REF6-0), the IPGA value does not increase.
FDATT ATT STEP
0
1
RESET
1
2
Table 12. FADEIN/OUT ATT Step Setting
LMAT1-0: ALC Limiter ATT Step
During the ALC limiter operation, when either Lch or Rch exceeds the ALC limiter detection
level set by LMTH, the number of steps attenuated from current IPGA value is set. For example,
when the current IPGA value is 68H in the state of LMAT1-0 bit = “11”, it becomes IPGA = 64H
by the ALC limiter operation, the input signal level is attenuated by 2dB (=0.5dB x 4).
When the attenuation value exceeds IPGA = “00” (MUTE), it clips to “00”.
LMAT1 LMAT0 ATT STEP
0
0
1
0
1
2
1
0
3
1
1
4
Table 13. ALC Limiter ATT Step Setting
RESET
ZELM: Enable zero crossing detection at ALC Limiter operation
0: Disable (RESET)
1: Enable
In case of ZELM = “1”, IPGA of each L/R channel do zero crossing or timeout independently, the
IPGA value is changed by ALC operation. Zero crossing timeout is the same as ALC recovery
operation. In case of ZELM = “0”, the IPGA value is changed immediately.
Rev. 0.9
- 23 -
2000/09