AK4561 Datasheet, PDF (16/48 Pages) Asahi Kasei Microsystems – 16bit CODEC with built-in ALC and MIC/HP-Amp

ASAHI KASEI
AKM CONFIDENTIAL
[AK4561]
n Audio Interface Format
Data is shifted in/out the SDTI/SDTO pins using BCLK and LRCK inputs. The serial data is MSB-first, 2's compliment
format, ADC is MSB justified and DAC is LSB justified.
LRCK
0 1 23
BCLK(I:32fs)
8 9 10 11 12 13 14 15 0 1 2 3
8 9 10 11 12 13 14 15 0 1
SDTO(o)
SDTI(i)
15 14 13 8 7 6 5 4 3 2 1 0 15 14 13 8 7 6 5 4 3 2 1 0 15
0 1 23
BCLK(I:64fs)
14 15 16 17 18
31 0 1 2 3
14 15 16 17 18
31 0 1
SDTO(o)
15 14 13 13 2 1 0
15 14 13 1 2 1 0
15
SDTI(i)
Don’t Care
15 14
15:MSB, 0:LSB
Lch Data
10
Don’t Care
15 14
Rch Data
10
Figure 7. Audio Data Timing
n Control Register Timing
The data on the 3-wire serial interface consists of op-code (3bit), address (LSB-first, 5bit) and control data (LSB-first,
8bit). The Transmitting data is output to each bit by “↓” of CCLK, the receiving data is latched by “↑” of CCLK. Writing
data becomes effective by “↑” of CS . CS should be held to “H” at no access.
CCLK always need 16 edges of “↑” during CS = “L” Address except 00H∼0BH are inhibited.
Writing of the control registers are invalid when op2-0 bits are except “111”.
CS
CCLK
CDTI
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
op0 op1op2 A0 A1 A2 A3 A4 D0 D1 D2 D3 D4 D5 D6 D7
"1" "1" "1"
op0-op2: Op-code (Fixed to "111:WRITE")
A0-A4: Address
D0-D7: Control Data
Figure 8. Control Data Timing
Rev. 0.9
- 16 -
2000/09