AK4561 Datasheet, PDF (22/48 Pages) Asahi Kasei Microsystems – 16bit CODEC with built-in ALC and MIC/HP-Amp

ASAHI KASEI
AKM CONFIDENTIAL
[AK4561]
Timer Select
Addr
Register Name
D7
D6
D5
D4
D3
D2
D1
D0
04H Timer Select
FDTM1 FDTM0 ZTM1 ZTM0 WTM1 WTM0 LTM1 LTM0
RESET
1
0
1
0
1
0
0
0
LTM1-0: ALC limiter operation period at zero crossing disable (ZELM = “0”)
The IPGA value is changed immediately. When the IPGA value is changed continuously, the
change is done by the period specified by LTM1-0 bits.
LTM1
LTM0
ALC Limiter Operation Period
48kz 44.1kHz 32kHz
0
0
1/fs
21µs
23µs
31µs RESET
0
1
2/fs
42µs
45µs
63µs
1
0
4/fs
83µs
91µs
125µs
1
1
8/fs 167µs 181µs
250µs
Table 6. ALC Limiter Operation Period at zero crossing disable (ZELM = “0”)
WTM1-0: ALC Recovery Waiting Period
A period of recovery operation when any limiter operation does not occur during ALC operation.
Recovery operation is done at period set by WTM1-0 bits.
When the input signal level exceeds auto recovery waiting counter reset level set by LMTH bit,
the auto recovery waiting counter is reset.
The waiting timer starts when the input signal level becomes below the auto recovery waiting
counter reset level.
These periods are value at fs=32kHz (FS bit = “0”) or fs=48kHz (FS bit = “1”).
WTM1 WTM0
Period
0
0
16.0ms
0
1
32.0ms
1
0
64.0ms RESET
1
1
128.0ms
Table 7. ALC Recovery Operation Waiting Period
ZTM1-0: Zero crossing timeout at writing operation by µP and ALC recovery operation and the zero crossing enable
(ZELM= “1”) of the ALC operation
When IPGA of each L/R channels do zero crossing or timeout independently, the IPGA value is
changed by µP WRITE operation or ALC recovery operation or ALC limiter operation (ZELM =
“1”).
These periods are value at fs=32kHz (FS bit = “0”) or fs=48kHz (FS bit = “1”).
ZTM1
ZTM0
Period
0
0
16.0ms
0
1
32.0ms
1
0
64.0ms RESET
1
1
128.0ms
Table 8. Zero Crossing Timeout
FDTM1-0: FADEIN/OUT Cycle Setting
The FADEIN/OUT operation is done by a period set by FDTM1-0 bits when FDIN or FDOUT
bits are set to “1”. When IPGA of each L/R channel do zero crossing or timeout independently,
the IPGA value is changed.
These periods are value at fs=32kHz (FS bit = “0”) or fs=48kHz (FS bit = “1”).
FDTM1 FDTM0
Period
0
0
16.0ms
0
1
32.0ms
1
0
64.0ms RESET
1
1
128.0ms
Table 9. FADEIN/OUT Period
Rev. 0.9
- 22 -
2000/09