AK5720 Datasheet, PDF (19/25 Pages) Asahi Kasei Microsystems – 96kHz 24-Bit ADC

[AK5720]
■ System Reset
The AK5720 should be reset once by bringing the PDN pin to “L” after power-up. In slave mode, reset and
power-down are released on the rising edge (falling edge in I²C compatible mode) of LRCK after setting the
PDN pin = “H”. In master mode, reset and power-down are released by MCLK input after setting the PDN pin
= “H”.
■ TDM Cascade Mode
TDM256mode
Four or less devices can be connected in cascades at the TDM256 mode. In Figure 13, the SDTO pin of device
#1/#2/#3 is connected with the TDMI pin of device #2/#3/#4. It is possible to output 8 channel TDM data from
the SDTO pin of device #4 as shown in Figure 14.
256fs
48kHz
256fs
AK5720 #1
MCLK DIF/TDMI
LRCK
BICK
SDTO
AK5720 #2
MCLK DIF/TDMI
LRCK
BICK
SDTO
AK5720 #3
MCLK DIF/TDMI
LRCK
BICK
SDTO
AK5720 #4
MCLK DIF/TDMI
LRCK
BICK
SDTO
GND
8ch TDM
Figure 13. Cascade TDM Connection Diagram
MS1641-E-02
- 19 -
2014/12