AK5720 Datasheet, PDF (10/25 Pages) Asahi Kasei Microsystems – 96kHz 24-Bit ADC

[AK5720]
12. Switching Characteristics
(Ta=−40C  105C; VA=VD=2.7  5.5V; C_L=20pF, unless otherwise specified)
Parameter
Symbol min
typ
Master Clock Timing
Master Clock 256fs:
fCLK
2.048 12.288
Pulse Width Low
tCLKL
16
Pulse Width High
tCLKH
16
384fs:
fCLK
3.072 18.432
Pulse Width Low
tCLKL
11
Pulse Width High
tCLKH
11
512fs:
fCLK
4.096 24.576
Pulse Width Low
tCLKL
16
Pulse Width High
tCLKH
16
768fs:
fCLK
6.144 36.864
Pulse Width Low
tCLKL
11
Pulse Width High
tCLKH
11
LRCK Timing (Slave Mode)
Normal mode
LRCK Frequency
fs
8
Duty Cycle
Duty
45
TDM256 MODE
LRCK Frequency
fs
8
“H” time
tLRH 1/256fs
“L” time
tLRL 1/256fs
LRCK Timing (Master Mode)
Normal mode
LRCK Frequency
fs
8
Duty Cycle
Duty
50
TDM256 MODE
LRCK Frequency
fs
8
“H” time
(Note 7)
Note 7. It will be “L” time in I²S format.
tLRH
1/8fs
max
24.576
36.864
24.576
36.864
96
55
96
96
96
Unit
MHz
ns
ns
MHz
ns
ns
MHz
ns
ns
MHz
ns
ns
kHz
%
kHz
ns
ns
kHz
%
kHz
ns
MS1641-E-02
- 10 -
2014/12