AK5730VQ_17 Datasheet, PDF (13/50 Pages) Asahi Kasei Microsystems – 4-Channel Differential Audio ADC for Line & Mic Inputs

[AK5730]
Parameter
Symbol
min
typ
max Unit
Control Interface Timing (4-wire serial mode)
CCLK Period
tCCK
200
-
-
ns
CCLK Pulse Width Low
tCCKL
80
-
-
ns
CCLK Pulse Width High
tCCKH
80
-
-
ns
CDTI Setup Time
tCDS
50
-
-
ns
CDTI Hold Time
tCDH
50
-
-
ns
CSN “H” Time
tCSW
150
-
-
ns
CSN “” to CCLK “”
tCSS
50
-
-
ns
CCLK “” to CSN “”
tCSH
50
-
-
ns
CDTO Delay
tDCD
-
-
45
ns
CSN “” to CDTO Hi-Z
Control Interface Timing (I²C Bus):
tCCZ
-
-
70
ns
SCL Clock Frequency
fSCL
-
-
400 kHz
Bus Free Time Between Transmissions
tBUF
1.3
-
-
s
Start Condition Hold Time (prior to first clock pulse)
tHD:STA
0.6
-
-
s
Clock Low Time
tLOW
1.3
-
-
s
Clock High Time
tHIGH
0.6
-
-
s
Setup Time for Repeated Start Condition
tSU :STA
0.6
-
-
s
SDA Hold Time from SCL Falling
(Note 19)
tHD :DAT
0
-
-
s
SDA Setup Time from SCL Rising
tSU :DAT 0.1
-
-
s
Rise Time of Both SDA and SCL Lines
tR
-
-
1.0
s
Fall Time of Both SDA and SCL Lines
tF
-
-
0.3
s
Setup Time for Stop Condition
tSU:STO
0.6
-
-
s
Pulse Width of Spike Noise Suppressed by Input Filter tSP :I²C
0
-
50
ns
Capacitive load on bus
Cb
-
-
400
pF
Power-down & Reset Timing
PDN Pulse Width
(Note 20)
tPD
150
-
-
ns
PDN “” to SDTO valid (FS1/0bit=“00”) (Note 21)
tPDV
-
3153
-
1/fs
PDN “” to SDTO valid (FS1/0bit=“01”) (Note 21)
-
2098
-
1/fs
PDN “” to SDTO valid (FS1/0bit=“10”) (Note 21)
-
1729
-
1/fs
Pulse Width of Spike Noise Suppressed by Input Filter
tSP :PD
0
-
20
ns
Note 19. データは最低300ns (SCLの立下り時間)の間、保持されなければなりません。
Note 20. AK5730は電源投入時にPDN pin を “L” に設定することでリセットされます。
Note 21. PDN pin を立ち上げてからのLRCKクロックの “” の回数です。
Note 22. I²C-busはNXP B.V.の商標です。
MS1577-J-03
- 13 -
2015/11