TSI-4 Datasheet, PDF (51/61 Pages) Agere Systems – 4k x 4k Time-Slot Interchanger

Data Sheet, Revision 3
September 21, 2005
TSI-4
4k x 4k Time-Slot Interchanger
Table 6-49. Transmit_CHI_Status (CORWN)
Address
0x00C80
Bit
Name/Description
Default
15:2 Unused.
—
1 Transmit_Lock_Error.
—
0 = No error detected.
1 = Indicates a synchronization error has occurred between the CHICLK and the internal
PLL clock. If Enable_Transmit_CHI_Automatic_Resynchronization is not a 1 (see
Table 6-51 on page 52), then a manual resynchronization should be performed
(Force_Transmit_CHI_Resynchronization, see Table 6-51).
0 Transmit_Frame_Sync_Error.
—
0 = No error detected.
1 = Indicates a frame synchronization error has occurred in the transmit CHI section of the
device. This means the CHI frame synchronization was either missing or misplaced. For
missing frame synchronizations, this status is the only action taken. For misplaced frame
synchronizations, the device automatically synchronizes to the new frame synchroniza-
tion position.
Table 6-50. Transmit_CHI_Status_Mask (Read/Write)
Mask register for the Transmit_CHI_Status register.
Address
0x00C82
Bit
Name/Description
15:2 Unused.
1 Transmit_Lock_Error_Mask.
0 = The Transmit_Lock_Error bit (see Table 6-49) will cause an interrupt if active (unless
masked at a higher level).
1 = The Transmit_Lock_Error bit is blocked from causing an interrupt.
0 Transmit_Frame_Sync_Error_Mask.
0 = The Transmit_Frame_Sync_Error bit (see Table 6-49) will cause an interrupt if active
(unless masked at a higher level).
1 = The Transmit_Frame_Sync_Error bit is blocked from causing an interrupt.
Default
—
1
1
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