AD9516-3 Datasheet, PDF (68/84 Pages) Analog Devices – 14-Output Clock Generator with Integrated 2.0 GHz VCO

AD9516-3
Table 54. Fine Delay Adjust: OUT6 to OUT9
Reg.
Addr
(Hex) Bit(s) Name
Description
A0 <0> OUT6 Delay
Bypass or use the delay function.
Bypass
<0> = 0; use delay function.
<0> = 1; bypass delay function.
A1 <5:3> OUT6 Ramp
Capacitors
Selects the number of ramp capacitors used by the delay function. The combination of the number of the
capacitors and the ramp current sets the delay full scale.
<5> <4> <3> Number of Capacitors
0004
0013
0103
0112
1003
1012
1102
1111
A1 <2:0> OUT6 Ramp
Current
Ramp current for the delay function. The combination of the number of capacitors and the ramp current
sets the delay full scale.
<2> <1> <0> Current (μA)
0 0 0 200
0 0 1 400
0 1 0 600
0 1 1 800
1 0 0 1000
1 0 1 1200
1 1 0 1400
1 1 1 1600
A2 <5:0> OUT6
Delay Fraction
Selects the fraction of the full-scale delay desired (6-bit binary).
000000 gives zero delay.
Only delay values up to 47 decimals (101111b; 0x2F) are supported.
A3 <0> OUT7 Delay
Bypass or use the delay function.
Bypass
<0> = 0; use delay function.
<0> = 1; bypass delay function.
A4 <5:3> OUT7 Ramp
Capacitors
Selects the number of ramp capacitors used by the delay function. The combination of the number of the
capacitors and the ramp current sets the delay full scale.
<5> <4> <3> Number of Capacitors
0004
0013
0103
0112
1003
1012
1102
1111
Rev. 0 | Page 68 of 84