EVAL-AD7741-42EBZ Datasheet, PDF (5/12 Pages) Analog Devices – Single and Multichannel, Synchronous Voltage-to-Frequency Converters

Pin No.
1
Mnemonic
V_DD
2
GND
3
CLKOUT
4
CLKIN
5
REFIN/OUT
6
V_IN
7
PD
8
f_OUT
AD7741/AD7742
AD7741 PIN FUNCTION DESCRIPTION
Function
Power Supply Input. These parts can be operated from +4.75 V to +5.25 V and the supply should
be adequately decoupled to GND.
Ground reference point for all circuitry on the part.
External Clock Output. When the master clock for the device is a crystal, the crystal is connected
between CLKIN and CLKOUT. When an external clock is applied to CLKIN, the CLKOUT pin
provides an inverted clock signal. This clock should be buffered if it is to be used as a clock source
elsewhere in the system.
External Clock Input. The master clock for the device can be provided in the form of a crystal or an
external clock. A crystal may be tied across the CLKIN and CLKOUT pins. Alternatively, the
CLKIN pin may be driven by a CMOS-compatible clock and CLKOUT left unconnected. The
frequency of the master clock may be as high as 6 MHz.
This is the reference input to the core of the VFC and defines the span of the VFC. If this pin is left
unconnected, the internal 2.5 V reference is used. Alternatively, a precision external reference (e.g.,
REF192) may be used to overdrive the internal reference. The internal bandgap reference has a
high output impedance in order to allow it to be overdriven.
The analog input to the VFC. It has an input range from 0 V to V_REF. This input is buffered so it
draws virtually no current from whatever source is driving it.
Active Low Power-Down pin. When this input is low, the part enters power-down mode where it
typically consumes 15 µA of current.
Frequency Output. This pin provides the output of the synchronous VFC.
PIN CONFIGURATION
V_DD ¹
8 f_OUT
GND 2 AD7741 7 PD
TOP VIEW
CLKOUT 3 _{(Not to Scale)} 6 V_IN
CLKIN 4
5 REFIN/OUT
REV. 0
–5–