EVAL-AD7741-42EBZ Datasheet, PDF (2/12 Pages) Analog Devices – Single and Multichannel, Synchronous Voltage-to-Frequency Converters

AD7741–SPECIFICATIONS (VDD = +4.75 V to +5.25 V; VREF = +2.5 V; fCLKIN = 6.144 MHz; all specifications TMIN to
T_MAX unless otherwise noted.)
Parameter²
B and Y Version¹
Min Typ
Max
Units
Conditions/Comments
DC PERFORMANCE
Integral Nonlinearity
f_CLKIN = 200 kHz³
f_CLKIN = 3 MHz³
f_CLKIN = 6.144 MHz
Offset Error
Gain Error
Offset Error Drift³
Gain Error Drift³
Power Supply Rejection Ratio³
ANALOG INPUT⁵
Input Current
Input Voltage Range
0
+0.8
± 30
± 16
–63
± 50
0
+2.5 V REFERENCE (REFIN/OUT)
REFIN
Nominal Input Voltage
2.5
Input Impedance⁶
N/A
REFOUT
Output Voltage
Output Impedance³
2.38 2.50
1
Reference Drift³
± 50
Line Rejection
–60
Reference Noise (0.1 Hz to 10 Hz)³
100
± 0.012
± 0.012
± 0.024
± 40
+1.6
± 100
V_REF
% of Span⁴
% of Span
% of Span
mV
% of Span
µV/°C
ppm of Span/°C
dB
V_DD > 4.8 V
∆V_DD = ± 5%
nA
V
V
2.60
V
kΩ
ppm/°C
dB
µV p-p
LOGIC OUTPUT
Output High Voltage, V_OH
Output Low Voltage, V_OL
Minimum Output Frequency
Maximum Output Frequency
LOGIC INPUT
PD ONLY
Input High Voltage, V_IH
Input Low Voltage, V_IL
Input Current
Pin Capacitance
CLKIN ONLY
Input High Voltage, V_IH
Input Low Voltage, V_IL
Input Current
Pin Capacitance
4.0
V
0.4
V
0.05 f_CLKIN
Hz
0.45 f_CLKIN
Hz
2.4
6
3.5
6
V
0.8
V
± 100
nA
10
pF
V
0.8
V
±2
µA
10
pF
Output Sourcing 800 µA⁷
Output Sinking 1.6 mA⁷
V_IN = 0 V
V_IN = V_REF
CLOCK FREQUENCY
Input Frequency
6.144
MHz
For Specified Performance
POWER REQUIREMENTS
V_DD
I_DD (Normal Mode)
I_DD (Power-Down)
Power-Up Time³
4.75
15
30
5.25
V
8
mA
35
µA
µs
Output Unloaded
Coming Out of Power-Down Mode
NOTES
1_{Temperature ranges: B Version –40°C to +85°C: Y Version: –40°C to +105°C.}
2_{See Terminology.}
3_{Guaranteed by design and characterization, not production tested.}
4_{Span = Maximum Output Frequency–Minimum Output Frequency.}
5_{The absolute voltage on the input pin must not go more positive than V DD – 2.25 V or more negative than GND.}
6_{Because this pin is bidirectional, any external reference must be capable of sinking/sourcing 400 µA in order to overdrive the internal reference.}
7_{These logic levels apply to CLKOUT only when it is loaded with one CMOS load.}
Specifications subject to change without notice.
–2–
REV. 0