ADP1823 Datasheet, PDF (17/32 Pages) Analog Devices – Dual, Interleaved, Step-Down DC-to-DC Controller with Tracking

ADP1823
In the case of output capacitors where the impedance of the ESR
and ESL are small at the switching frequency, for instance,
where the output cap is a bank of parallel MLCC capacitors, the
capacitive impedance dominates and the ripple equation
reduces to
ΔV_OUT
≅
ΔI _L
8 C_OUT
f _SW
(7)
Make sure that the ripple current rating of the output capacitors
is greater than the maximum inductor ripple current.
During a load step transient on the output, the output capacitor
supplies the load until the control loop has a chance to ramp the
inductor current. This initial output voltage deviation due to a
change in load is dependent on the output capacitor characteristics.
Again, usually the capacitor ESR dominates this response, and
the ΔVOUT in Equation 6 can be used with the load step current
value for ΔIL.
SELECTING THE MOSFETS
The choice of MOSFET directly affects the dc-to-dc converter
performance. The MOSFET must have low on resistance
(RDSON) to reduce I²R losses and low gate-charge to reduce
switching losses. In addition, the MOSFET must have low
thermal resistance to ensure that the power dissipated in the
MOSFET does not result in overheating.
The power switch, or high-side MOSFET, carries the load
current during the PWM on-time, carries the transition loss of
the switching behavior, and requires gate charge drive to switch.
Typically, the smaller the MOSFET RDSON, the higher the gate
charge and vice versa. Therefore, it is important to choose a
high-side MOSFET that balances those two losses. The conduction
loss of the high-side MOSFET is determined by the equation
P_C
≅
I _L ² R_DSON
V_OUT
V_IN
(8)
where:
PC = conduction power loss.
RDSON = MOSFET on resistance.
The gate charge losses are dissipated by the ADP1823 regulator
and gate drivers and affect the efficiency of the system. The gate
charge loss is approximated by the equation
P_G ≅ V_IN Q_G f _SW
(9)
where:
PG = gate charge power.
QG = MOSFET total gate charge.
fSW = converter switching frequency.
Making the conduction losses balance the gate charge losses
usually yields the most efficient choice.
Furthermore, the high-side MOSFET transition loss is
approximated by the equation
( ) _PT
≅
V_IN I_L t_R + t_F
2
f_SW
(10)
where tR and tF are the rise and fall times of the selected
MOSFET as stated in the MOSFET data sheet.
The total power dissipation of the high-side MOSFET is the
sum of the previous losses:
P_D = P_C + P_G + P_T
(11)
where PD is the total high-side MOSFET power loss. This
dissipation heats the high-side MOSFET.
The conduction losses may need an adjustment to account for
the MOSFET RDSON variation with temperature. Note that
MOSFET RDSON increases with increasing temperature. The
MOSFET data sheet should list the thermal resistance of the
package, θJA, along with a normalized curve of the temperature
coefficient of the RDSON. For the power dissipation estimated
above, calculate the MOSFET junction temperature rise over
the ambient temperature of interest:
T_J = T_A + θ _JA P_D
(12)
Then calculate the new RDSON from the temperature coefficient
curve and the RDSON spec at 25°C. A typical value of the
temperature coefficient (TC) of the RDSON is 0.004/°C, so an
alternate method to calculate the MOSFET RDSON at a second
temperature, TJ, is
R_DSON @ T_J = R_DSON @ 25°C [1 + TC(T_J − 25°C )] (13)
Then the conduction losses can be recalculated and the
procedure iterated once or twice until the junction temperature
calculations are relatively consistent.
The synchronous rectifier, or low-side MOSFET, carries the
inductor current when the high-side MOSFET is off. For high
input voltage and low output voltage, the low-side MOSFET
carries the current most of the time, and therefore, to achieve
high efficiency it is critical to optimize the low-side MOSFET
for small on resistance. In cases where the power loss exceeds
the MOSFET rating, or lower resistance is required than is
available in a single MOSFET, connect multiple low-side
MOSFETs in parallel. The equation for low-side MOSFET
power loss is
P_LS
≅
I_L²R_{DSON ⎜⎜⎝⎛}1
−
V_OUT
V_IN
⎟⎞
⎟⎠
(14)
where:
PLS is the low-side MOSFET on resistance.
RDSON is the parallel combination of the resistances of the low-
side MOSFETs.
Check the gate charge losses of the synchronous rectifier(s)
using the PG equation (Equation 9) to be sure they are
reasonable.
Rev. A | Page 17 of 32