EVAL-AD1835AEB Datasheet, PDF (15/24 Pages) Analog Devices – 2 ADC, 8 DAC, 96 kHz, 24-Bit Codecs

LRCLK
BCLK
16 BCLKs
128 BCLKs
ADC
DATA
SLOT 1
LEFT
SLOT 2
SLOT 3
SLOT 4
SLOT 5
RIGHT
SLOT 6
SLOT 7
SLOT 8
MSB MSB – 1 MSB – 2
Figure 7. ADC Packed Mode 128
LRCLK
BCLK
32 BCLKs
256 BCLKs
ADC
DATA
SLOT 1
LEFT
SLOT 2
SLOT 3
SLOT 4
SLOT 5
RIGHT
SLOT 6
SLOT 7
SLOT 8
MSB MSB – 1 MSB – 2
Figure 8. ADC Packed Mode 256
LRCLK
BCLK
16 BCLKs
128 BCLKs
DAC SLOT 1 SLOT 2 SLOT 3 SLOT 4 SLOT 5 SLOT 6 SLOT 7 SLOT 8
DATA LEFT 1 LEFT 2 LEFT 3 LEFT 4 RIGHT 1 RIGHT 2 RIGHT 3 RIGHT 4
MSB MSB – 1 MSB – 2
Figure 9. DAC Packed Mode 128
LRCLK
BCLK
32 BCLKs
256 BCLKs
DAC SLOT 1 SLOT 2 SLOT 3 SLOT 4 SLOT 5 SLOT 6 SLOT 7 SLOT 8
DATA LEFT 1 LEFT 2 LEFT 3 LEFT 4 RIGHT 1 RIGHT 2 RIGHT 3 RIGHT 4
MSB MSB – 1 MSB – 2
Figure 10. DAC Packed Mode 256
ABCLK
ALRCLK
t_ABH
t_ABL
t_ALS
t_ALH
ASDATA
MSB
AD1835A
MSB – 1
t_ABDD
Figure 11. ADC Packed Mode Timing
DBCLK
DLRCLK
DSDATA
t_DBH
t_DBL
t_DLS
t_DLH
t_DDS
MSB
t_DDH
MSB – 1
Figure 12. DAC Packed Mode Timing
REV. A
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