EVAL-AD1871EBZ Datasheet, PDF (11/28 Pages) Analog Devices – Stereo Audio, 24-Bit, 96 kHz, Multibit
- ADC

AD1871
Pin Function Redefinition in External Control Mode
Pin Input/
No. Output Mnemonic
Description
2I
3I
4I
5I
256/512
DF0
DF1
M/S
Clock Rate Select. This pin is used to select between an MCLK of 256 Ï« f_S (pin low) or
512 Ï« f_S (pin high).
Data Format Select 0. This pin is used as the low bit (DF0) of the data format selection
(see section on External Control).
Data Format Select 1. This pin is used as the high bit (DF1) of the data format selection
(see section on External Control).
Master/Slave Select. This pin is used to select between the Master (pin low) or Slave (pin
high) Modes.
Pin Function Redefinition in Modulator Mode
Pin Input/
No. Output Mnemonic
Description
3O
25 O
26 O
27 O
28 O
MODCLK
D3
D2
D1
D0
This pin provides a clock output that allows the user to decode the left and right channel
modulator outputs. It is similar to a left/right clock but runs (nominally) at 5.6448 MHz
and gates a 4-bit modulator output word in each phase (see section on Modulator Mode).
Bit 3 of the Modulator Output Word
Bit 2 of the Modulator Output Word
Bit 1 of the Modulator Output Word
Bit 0 of the Modulator Output Word
REV. 0
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