ADSP-BF542_07 Datasheet, PDF (1/68 Pages) Analog Devices – Embedded Processor

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Blackfin^®
Embedded Processor
Preliminary Technical Data
ADSP-BF542/BF544/BF548/BF549
FEATURES
Up to 600 MHz High-Performance Blackfin Processor
Two 16-Bit MACs, Two 40-Bit ALUs, Four 8-Bit Video ALUs
RISC-Like Register and Instruction Model
0.9 V to TBD V Core VDD with On-chip Voltage Regulation
2.5 V and 3.3 V-Tolerant I/O with Specific 5V-Tolerant Pins
400-ball Lead-Free mBGA Package
MEMORY
Up to 324K bytes of on-chip memory comprised of:
Instruction SRAM/cache; instruction SRAM;
data SRAM/cache; additional dedicated data SRAM;
scratchpad SRAM (see Table 1 on Page 3 for available
memory configurations
External Sync Memory Controller Supporting
DDR/Mobile DDR SDRAM
External Async Memory Controller Supporting 8/16 bit Async
Memories and Burst Flash Devices
NAND Flash Controller
Four Memory-to-Memory DMA pairs, two with external
requests
Memory Management Unit Providing Memory Protection
Flexible Booting Options
Code Security with Lockbox^TM Secure Technology
One-Time-Programmable (OTP) Memory
PERIPHERALS
High-Speed USB On-the-Go (OTG) with Integrated PHY
SD/SDIO Controller
ATA/ATAPI-6 Controller
Up to Four Synchronous Serial Ports (SPORTs)
Up to Three Serial Peripheral Interfaces (SPI-Compatible)
Up to Four UARTs, Two with Automatic Hardware Flow
Control
Up to Two CAN (Controller Area Network) 2.0B Interfaces
Up to Two TWI (Two-Wire Interface) Controllers
8- or 16-Bit Asynchronous Host DMA Interface
Multiple Enhanced Parallel Peripheral Interfaces (EPPIs), Sup-
porting ITU-R BT.656 Video Formats and 18/24-bit LCD
Connections
Media Transceiver (MXVR) for connection to a MOST^®
Network
Pixel Compositor for overlays, alpha blending, and color
conversion
Up to Eleven 32-Bit Timers/Counters with PWM Support
Real-Time Clock (RTC) and Watchdog Timer
Up/Down Counter With Support for Rotary Encoder
Up to 152 General Purpose I/O (GPIOs)
On-Chip PLL Capable of 1x to 63x Frequency Multiplication
Debug/JTAG Interface
CAN (0-1)
TWI (0-1)
TIMERS(0-10)
COUNTER
KEYPAD
PAB 16
VOLTAGE
REGULATOR
JTAG TEST AND
EMULATION
RTC
WATCHDOG
TIMER
OTP
L2
SRAM
B
L1
INSTR ROM
L1
INSTR SRAM
L1
DATA SRAM
INTERRUPTS
MXVR
USB
DCB 32
BOOT
ROM
EAB 64
DEB 32
EXTERNAL PORT
NOR, DDR1 CONTROL
DDR1
16
ASYNC
16
32-BIT DMA
16-BIT DMA
DAB1 32
DAB0 16
ATAPI
NAND FLASH
CONTRLOLLER
HOST DMA
UART (0-1)
UART (2-3)
SPI (0-1)
SPI (2)
SPORT (2-3)
SPORT (0-1)
SD / SDIO
EPPI (0-2)
PIXEL
COMPOSITOR
• Blackfin and the Blackfin logo are registered trademarks of Analog Devices, Inc.
Rev. PrE
Figure 1. Functional Block Diagram
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