PAC5250_17 Datasheet, PDF (17/70 Pages) Active-Semi, Inc – Power Application Controller

PAC5250
Power Application Controller
Table 7. I/O Ports Pin Description
PIN NAME
PC2/AD2
PC3/AD3
PD0/SWDIO
PD1/SWDCL/EXTCLK
PD2/PWMA3/PWMA4/PWMB0
PD3/PWMA5/PWMA7/PWMB1
PD4/PWMD1
PD5/PWMA5/PWMC1
PD6/PWMA7/PWMB1
PE0/SPICLK
PE1/SPIMOSI/UARTTX
PE2/SPIMISO/UARTRX
PIN NUMBER
4
3
49
48
47
46
45
44
43
50
51
52
FUNCTION
PC2
AD2
PC3
AD3
PD0
SWDIO
PD1
SWDCL
EXTCLK
PD2
PWMA3
PWMA4
PWMB0
PD3
PWMA5
PWMA7
PWMB1
PD4
PWMD1
PD5
PWMA5
PWMC1
PD6
PWMA7
PWMB1
PE0
SPICLK
PE1
SPIMOSI
UARTTX
PE2
SPIMISO
UARTRX
TYPE
I/O
Analog
I/O
Analog
I/O
I/O
I/O
I
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
I/O
I/O
I
DESCRIPTION
I/O port C2.
ADC input 2.
I/O port C3.
ADC input 3.
I/O port D0.
Serial wire debug I/O.
I/O port D1.
Serial wire debug clock.
External clock.
I/O port D2.
Timer A PWM/capture 3.
Timer A PWM/capture 4.
Timer B PWM/capture 0.
I/O port D3.
Timer A PWM/capture 5.
Timer A PWM/capture 7.
Timer B PWM/capture 1.
I/O port D4.
Timer D PWM/capture 1.
I/O port D5.
Timer A PWM/capture 5.
Timer C PWM/capture 1.
I/O port D6.
Timer A PWM/capture 7.
Timer B PWM/capture 1.
I/O port E0.
SPI clock.
I/O port E1.
SPI master out slave in (MOSI).
UART transmit output.
I/O port E2.
SPI master in slave out (MISO).
UART receive input.
- 17 -
Rev 1.7‒April 15, 2016