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OMAP3503DCBBA Datasheet, PDF (223/264 Pages) Texas Instruments – OMAP3515 and OMAP3503 Applications Processors
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OMAP3515, OMAP3503
SPRS505H – FEBRUARY 2008 – REVISED OCTOBER 2013
HSU0
hsusb0_clk
hsusb0_stp
hsusb0_dir_&_nxt
hsusb0_data[7:0]
HSU1
HSU1
HSU3
HSU2
Data_OUT
HSU2
HSU5
Data_IN
Figure 6-49. High-Speed USB – 12-bit Slave Mode
HSU4
HSU6
030-086
6.6.4.2 High-Speed Universal Serial Bus (USB) on Ports 1 and 2 – 12-bit Master Mode
Table 6-99 and Table 6-100 assume testing over the recommended operating conditions (see Figure 6-
50).
Input Conditions
tR
tF
Output Conditions
CLOAD
Table 6-98. High-Speed USB Timing Conditions – 12-bit Master Mode
TIMING CONDITION PARAMETER
VALUE
Input signal rise time
2
Input signal fall time
2
Output load capacitance
3
UNIT
ns
ns
pF
Table 6-99. High-Speed USB Timing Requirements – 12-bit Master Mode(1)
NO.
PARAMETER
HSU3 ts(DIRV-CLKH)
Setup time, hsusbx_dir valid before hsusbx_clk rising edge
ts(NXTV-CLKH)
Setup time, hsusbx_nxt valid before hsusbx_clk rising edge
HSU4 th(CLKH-DIRIV)
Hold time, hsusbx_dir valid after hsusbx_clk rising edge
th(CLKH-NXT/IV)
Hold time, hsusbx_nxt valid after hsusbx_clk rising edge
HSU5 ts(DATAV-CLKH)
Setup time, hsusbx_data[0:7] valid before hsusbx_clk rising edge
HSU6 th(CLKH-DATIV)
Hold time, hsusbx_data[0:7] valid after hsusbx_clk rising edge
(1) In hsusbx, x is equal to 1 or 2.
1.15 V
MIN
MAX
9.3
9.3
0.2
0.2
9.3
0.2
Table 6-100. High-Speed USB Switching Characteristics – 12-bit Master Mode(1)
N O.
HSU0
HSU1
HSU2
fp(CLK)
tj(CLK)
td(clkL-STPV)
td(clkL-STPIV)
td(clkL-DV)
PARAMETER
hsusbx_clk clock frequency
Jitter standard deviation(2), hsusbx_clk
Delay time, hsusbx_clk high to output hsusbx_stp valid
Delay time, hsusbx_clk high to output hsusbx_stp invalid
Delay time, hsusbx_clk high to output hsusbx_data[0:7] valid
1.15 V
MIN
MAX
60
200
13
2
13
UNIT
ns
ns
ns
ns
ns
ns
UNIT
MHz
ps
ns
ns
ns
(1) In hsusbx, x is equal to 1 or 2.
(2) The jitter probability density can be approximated by a Gaussian function.
Copyright © 2008–2013, Texas Instruments Incorporated
TIMING REQUIREMENTS AND SWITCHING CHARACTERISTICS 223
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